EP910LI-40 vs EP910LI-35T 비교
다음의 상세 나란히 비교: EP910LI-40 제조: Altera 및 EP910LI-35T 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EP910LI-40 | EP910LI-35T |
|---|---|---|
| 브랜드 | Altera | Intel |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | 최종 구매 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $12.90 | $28.50 |
| Manufacturer | Altera (now Intel PSG) | — |
| Product Family | Classic EPLD - EP910 series | — |
| Device Type | Erasable Programmable Logic Device (EPLD) | — |
| Macrocells | 24 | — |
| Dedicated Inputs | 12 | — |
| I/O Pins | 24 bidirectional | — |
| Maximum Logic Inputs | 36 | — |
| Product Terms | 240 | — |
| Propagation Delay (tPD) | 40 ns | 35 ns |
| Technology | Low-power CMOS (L-suffix) | CMOS, EPROM-based |
| 동작 온도 | -40C to +85C (industrial, I-suffix) | -40C to +85C (industrial, 'I' suffix) |
| 패키지 | PLCC-44 (J-lead, windowed ceramic) | 44-pin PLCC (JEDEC) |
| 실장 유형 | Surface Mount (socket-compatible) | Surface Mount / Socket |
| Programmability | UV-erasable, JEDEC-standard algorithm | — |
| RoHS 상태 | Non-compliant (windowed ceramic PLCC, legacy) | [DATA_NEEDED: RoHS compliance] |
| Lifecycle | Obsolete - replaced by MAX 7000 / MAX II CPLD family | — |
| Family | — | Classic EPLD (EP910) |
| Logic Elements | — | 24 macrocells |
| Usable Gates | — | 450 |
| Maximum Toggle Frequency (fMAX) | — | 28.6 MHz |
| Supply Voltage (VCC) | — | 5 V (4.75 V to 5.25 V) |
| Programming Method | — | EPROM (UV-erasable for windowed versions) |
| Data Retention | — | [DATA_NEEDED: data retention years] |
| Number of I/O Pins | — | [DATA_NEEDED: I/O pin count] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |