EPC16QC100II vs EPC16QC100DM 비교

다음의 상세 나란히 비교: EPC16QC100II 제조: Altera 및 EPC16QC100DM 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPC16QC100II EPC16QC100DM
브랜드 Altera Intel
카테고리 Memory ICs Memory ICs
수명 주기 상태 NRND NRND
재고 상태 In Stock In Stock
단가 (USD) $10.75 $15.85
메모리 유형 FPGA Configuration PROM (Flash-based) Non-volatile Configuration PROM (NOR flash)
Memory Density 16 Mbit 16 Mbit (2 Mbyte)
Supported FPGA Families APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, FLEX 8000, Cyclone —
Configuration Mode FPP / PSA (Fast Passive Parallel / Passive Serial Asynchronous) —
Programmability In-System Programmable via IEEE 1149.1 (JTAG) —
Cascade Support Yes (multi-PROM cascading supported) —
Core Supply Voltage 3.3 V —
I/O Tolerance 5 V tolerant configuration pins —
패키지 100-pin PQFP (Plastic Quad Flat Pack) 100-pin PQFP (QFPA)
Package Dimensions 20 mm x 14 mm, 0.5 mm pitch —
Lead Finish Matte Tin (lead-free) —
동작 온도 -40C to +85C (Industrial) —
MSL 레벨 3 (per JEDEC J-STD-020) [DATA_NEEDED: MSL rating]
RoHS 상태 Compliant —
Configuration Pins DCLK, DATA[0..n], nCONFIG, nSTATUS, CONF_DONE, OE —
Compression Support Yes (reduces on-PROM footprint vs uncompressed bitstream) —
Configuration Interface — Serial (SPI-compatible, Altera FPP mode)
Core Supply Voltage (VCC) — 3.0 V to 3.6 V
I/O Voltage (VIO) — 2.5 V / 3.3 V selectable
Output Voltage (VPP) — 1.8 V / 2.5 V / 3.3 V selectable
Maximum DCLK Frequency — 40 MHz
Cascadable — Yes (multi-device daisy chain via nCASC)
In-System Programming — Yes (IEEE 1532 / JTAG)
Program/Erase Cycles — [DATA_NEEDED: program/erase cycle endurance]
Data Retention — [DATA_NEEDED: data retention years]
동작 온도 범위 — -40 C to +85 C (industrial)
Package Code — Q100 + DM suffix
Lead-Free / RoHS — [DATA_NEEDED: lead-free status]
Compatible FPGA Families — Stratix, Cyclone, APEX, ACEX

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