EPC2TC32UCAF48 vs EPC2TC32UCAF 비교

다음의 상세 나란히 비교: EPC2TC32UCAF48 제조: Altera 및 EPC2TC32UCAF 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPC2TC32UCAF48 EPC2TC32UCAF
브랜드 Altera Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete Obsolete
재고 상태 In Stock In Stock
단가 (USD) $14.20 $9.95
메모리 크기 1.6 Mb —
Device Family EPC2 (Enhanced Configuration Device) —
Programmability In-system programmable (ISP) via JTAG —
인터페이스 4-wire serial (nCS, DCLK, DATA, nINIT_CONF) + JTAG —
Supply Voltage (VCC) 3.3 V nominal 3.0 V to 3.6 V
FPGA Compatibility Altera SRAM-based LUT FPGAs (Cyclone, Stratix, APEX, ACEX, FLEX, MAX 9000) —
Cascading Supported for bitstreams larger than 1.6 Mb —
패키지 32-pin TQFP (CAF48 designation per Altera ordering code) 32-pin TQFP (CAF48), 7x7 mm
동작 온도 [DATA_NEEDED: commercial 0-70C vs industrial -40-85C variant] [DATA_NEEDED: operating temperature range]
Data Retention 10 years typical (EEPROM-based) —
Programming Cycles 100 cycles minimum (EEPROM endurance) —
Process Technology CMOS EEPROM —
실장 유형 Surface Mount Surface Mount
MSL 레벨 [DATA_NEEDED: MSL classification] [DATA_NEEDED: MSL rating]
RoHS 상태 [DATA_NEEDED: per ordering code; older CAF48 lots were non-RoHS] [DATA_NEEDED: RoHS compliance status]
Device Type — Configuration PROM (CPLD-style boot memory)
Memory Density — 1.6 Mbit
Supported FPGA Families — Altera APEX, Cyclone, Stratix, FLEX (LUT devices)
I/O Logic Levels — 3.3 V / 2.5 V compatible
Configuration Interface — FLEX passive serial / passive parallel synchronous / passive parallel asynchronous
Programming Interface — IEEE 1149.1 (JTAG) in-system programmable
Daisy-Chain Support — Yes (via nCASC pin, multi-device FLEX chain)
Compression Support — Altera bitstream compression compatible
Lead-Free — [DATA_NEEDED: lead-free status]
할로겐 프리 — [DATA_NEEDED: halogen-free status]

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