EPC4QC1C00N vs EPC4QC100T 비교
다음의 상세 나란히 비교: EPC4QC1C00N 제조: Altera 및 EPC4QC100T 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPC4QC1C00N | EPC4QC100T |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | Memory ICs |
| 수명 주기 상태 | Obsolete | NRND |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $9.10 | $10.25 |
| Device Family | Enhanced Configuration Device (EPC4) | — |
| Memory Density | 4 Mbit (4,194,304 bits) | 4 Mbit |
| Supply Voltage (VCC) | 3.0 V to 3.6 V (3.3 V typical) | 3.0 V to 3.6 V (3.3 V typ) |
| I/O Voltage Tolerance | 3.3 V / 5 V tolerant | — |
| Interface to FPGA | Serial DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE | — |
| Configuration Data Width | 4-bit multiplexed on single DATA pin | — |
| 패키지 | 100-pin PQFP (QFP-100) | 100-pin PQFP (Plastic Quad Flat Pack), 20 x 14 mm |
| 동작 온도 | -40 C to +85 C (industrial) | -40 C to +85 C (industrial) |
| In-System Programming | JTAG (IEEE 1149.1) | IEEE 1149.1 JTAG + serial interface |
| Programming Voltage | On-chip generated, no external VPP | — |
| Page Mode | Yes, multi-page storage supported | — |
| Target FPGA Families | Stratix, Cyclone, APEX, Mercury, ACEX | — |
| Configuration Clock (DCLK) | [DATA_NEEDED: DCLK max frequency] | — |
| MSL 레벨 | 3 (per JEDEC J-STD-020) | 3 (per JEDEC J-STD-020) |
| RoHS 상태 | [DATA_NEEDED: RoHS compliance status] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| 메모리 유형 | — | Flash configuration PROM (non-volatile) |
| Configuration Interface | — | Serial / x8 Parallel (selectable) |
| Maximum Serial Clock Frequency | — | 66 MHz |
| Supported FPGAs | — | Altera/Intel Cyclone, Stratix, APEX families |
| I/O Voltage (VCCIO / MultiVolt) | — | 1.8 V / 2.5 V / 3.3 V / 5.0 V |
| JTAG Support | — | Yes (1149.1 boundary-scan compliant) |
| Configuration Modes | — | Serial (1-bit) and Parallel (x8) |
| Daisy-Chain Support | — | Yes (EPC4-to-EPC4 only) |
| 실장 유형 | — | Surface Mount |
| Lead-Free / RoHS | — | Lead-free; RoHS compliance depends on date code |