EPF10K130EBC356-1 vs EPF10K130EBC356-1N 비교

다음의 상세 나란히 비교: EPF10K130EBC356-1 제조: Altera 및 EPF10K130EBC356-1N 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPF10K130EBC356-1 EPF10K130EBC356-1N
브랜드 Altera Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete Obsolete
재고 상태 In Stock In Stock
단가 (USD) $95.00 $18.20
Series FLEX 10KE —
Device Family FLEX-10KE Field Programmable Gate Array —
Typical Gate Count 130,000 gates —
Logic Elements (LEs) 6,656 6,656
Embedded Memory (EABs) 65,536 bits (8 Kbyte) / 12 EABs —
Logic Array Blocks (LABs) 832 —
Maximum User I/O 274 —
Maximum Operating Frequency 333 MHz —
Propagation Delay 0.6 ns 0.6 ns
Core Voltage 2.5 V —
I/O Voltage 3.3 V (5 V tolerant) —
Logic Family CMOS CMOS
Process Technology 0.22 µm SRAM 0.22 µm
패키지 356-LBGA (35x35 mm) 356-LBGA
실장 유형 Surface Mount Surface Mount
동작 온도 0C to +70C (Commercial) 0 °C to 70 °C (Commercial)
Configuration Interface JTAG (IEEE 1149.1), Passive Serial, Passive Parallel —
Family — FLEX 10KE
Typical Gates — 130,000
Maximum System Gates — [DATA_NEEDED: maximum system gates for EPF10K130E]
Embedded Array Blocks (EABs) — [DATA_NEEDED: EAB count for EPF10K130E]
Total RAM Bits — 65,536
User I/O Pins — 274
Package Code — LBGA
Core Supply Voltage — 2.5 V
I/O Supply Voltage — 3.3 V
Speed Grade — -1
Maximum Internal Frequency — 333.33 MHz
JTAG Boundary-Scan — IEEE Std. 1149.1-1990 compliant
PCI Compliance — PCI Local Bus Specification Rev. 2.2 (33/66 MHz, 3.3 V and 5.0 V)
RoHS 상태 — [DATA_NEEDED: RoHS compliance for EPF10K130EBC356-1N]

데이터시트 & 자료

모든 제품 보기 BOM 생성 견적 요청