EPF10K200SRC240-3N vs EPF10K200SRC240-2 비교
다음의 상세 나란히 비교: EPF10K200SRC240-3N 제조: Intel 및 EPF10K200SRC240-2 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPF10K200SRC240-3N | EPF10K200SRC240-2 |
|---|---|---|
| 브랜드 | Intel | Intel |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $162.00 | $62.50 |
| Family | FLEX 10KE | FLEX 10KS (FLEX 10KE/10KA generation) |
| Typical System Gates | 200,000 | — |
| Logic Elements (LEs) | 9,984 | — |
| Maximum Logic Elements | 9,984 | — |
| Embedded Array Blocks (EABs) | 24 | — |
| Maximum User RAM Bits | 98,304 | — |
| Logic Array Blocks (LABs) | 1,248 | — |
| User I/Os | 470 (effective); 182 user pins per RQFP-240 with the rest assigned to dedicated functions | — |
| Propagation Delay (tPD) | 0.40 ns | — |
| Internal Operating Frequency | 166.67 MHz | — |
| Process Technology | 0.22 µm CMOS SRAM | 0.42 micrometer CMOS SRAM |
| Core Supply Voltage | 2.5 V | 2.375 V to 2.625 V (nominal 2.5 V) |
| MultiVolt I/O Support | 2.5 V and 3.3 V interfaces | — |
| 동작 온도 | 0 °C to +70 °C (Commercial) | 0C to +70C (Commercial, TA) |
| 패키지 | 240-pin RQFP (Power QFP) with exposed pad, 34.6 x 34.6 mm, 0.5 mm pitch | — |
| 실장 유형 | Surface Mount | Surface Mount |
| JTAG Support | IEEE Std 1149.1 Boundary-Scan (contributes up to 31,250 gates of test logic) | — |
| Configuration Method | SRAM-based; requires external configuration device (e.g., EPC2) for power-up loading | — |
| RoHS 상태 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Speed Grade | -3 (commercial) | -2 (~80 MHz internal, typical) |
| Series | — | FLEX 10KS |
| Number of Logic Elements (LEs) | — | 9984 |
| Number of Logic Array Blocks (LABs) | — | 1248 |
| Total RAM Bits | — | 98304 |
| Number of User I/Os | — | 182 |
| Number of Gates | — | 513000 |
| 패키지 / 케이스 | — | 240-BFQFP Exposed Pad (240-RQFP, 32x32 mm) |
| Terminal Form | — | GULL WING |
| Number of Terminals | — | 240 |
| Configuration Interface | — | IEEE 1149.1 JTAG + Altera EPC EEPROM |