EPF8820ARC208-2A vs EPF8820ARC208-3 비교
다음의 상세 나란히 비교: EPF8820ARC208-2A 제조: Altera 및 EPF8820ARC208-3 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Altera
EPF8820ARC208-2A - FLEX 8000 FPGA, 672 Logic Elements, 152 I/O | Altera
EPF8820ARC208-2A ObsoleteIntel
EPF8820ARC208-3 - FLEX 8000 FPGA, 8K Gates, 672 Cells | Intel / Altera
EPF8820ARC208-3 Obsolete사양 비교
| 파라미터 | EPF8820ARC208-2A | EPF8820ARC208-3 |
|---|---|---|
| 브랜드 | Altera | Intel |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $14.10 | $62.00 |
| Family | FLEX 8000 | FLEX 8000 (EPF8820) |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Logic Elements | 672 | — |
| Logic Array Blocks (LABs) | 84 | — |
| Embedded Array Blocks (EABs) | [DATA_NEEDED: EAB count] | — |
| User I/O Pins | 152 | — |
| Dedicated Inputs | 4 | — |
| Total RAM Bits | [DATA_NEEDED: distributed RAM bits] | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 5.0 V selectable | — |
| Propagation Delay (tPD) | 5 ns (typical, -2A speed grade) | — |
| 동작 온도 | 0 °C to 70 °C (commercial) | — |
| 패키지 | 208-pin S-PQFP (Shrink Plastic Quad Flat Pack) with exposed pad | — |
| Terminal Pitch | 0.500 mm | — |
| Configuration Method | Serial SRAM, EPC1/EPC1064/EPC1213/EPC1441 PROM, or controller | — |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan) | — |
| Process Technology | CMOS SRAM | 0.42 µm CMOS |
| 실장 유형 | Surface Mount | Surface Mount |
| RoHS 상태 | [DATA_NEEDED: check distributor listing] | [DATA_NEEDED: RoHS status] |
| Series | — | FLEX 8000 |
| Usable Gates | — | 8,000 |
| Logic Cells / Elements | — | 672 |
| Registers | — | 152 |
| Maximum Operating Frequency | — | 125 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Configuration Memory | — | SRAM (volatile) |
| 패키지 / 케이스 | — | 208-BFQFP Exposed Pad (208-RQFP, 28x28 mm) |
| Supplier Device Package | — | 208-RQFP (28x28) |
| Packaging | — | Tray |
| 동작 온도 범위 | — | [DATA_NEEDED: operating temperature range] |
| In-Circuit Reconfigurability (ICR) | — | Yes (via external configuration devices) |
| Boundary-Scan Test | — | JTAG (IEEE 1149.1) |
| I/O Tolerance | — | 3.3 V / 5 V |
| Clock Networks | — | 4 dedicated low-skew global clocks |
| Lead-Free / Finish | — | [DATA_NEEDED: lead-free finish] |