EPF8820ARC208-4 vs EPF8820ARC208-3 비교
다음의 상세 나란히 비교: EPF8820ARC208-4 제조: Altera 및 EPF8820ARC208-3 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Altera
EPF8820ARC208-4 - FLEX 8000 FPGA, 8K Gates, 672 Cells, 208-RQFP | Altera
EPF8820ARC208-4 ⚠ 최종 구매Intel
EPF8820ARC208-3 - FLEX 8000 FPGA, 8K Gates, 672 Cells | Intel / Altera
EPF8820ARC208-3 Obsolete사양 비교
| 파라미터 | EPF8820ARC208-4 | EPF8820ARC208-3 |
|---|---|---|
| 브랜드 | Altera | Intel |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 최종 구매 | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $25.40 | $62.00 |
| Device Family | FLEX 8000 | — |
| Series | FLEX 8000 | FLEX 8000 |
| Usable Gates | 8,000 (up to 16,000 with utilization) | 8,000 |
| Logic Elements (Cells) | 672 | — |
| Number of Registers | 1,500 | — |
| Maximum User I/O | 152 | — |
| Supply Voltage (VCCINT/Logic Core) | 5 V nominal (4.75 V - 5.25 V) | — |
| 패키지 / 케이스 | 208-BFQFP (RQFP) Exposed Pad | 208-BFQFP Exposed Pad (208-RQFP, 28x28 mm) |
| Package Dimensions | 28 mm x 28 mm | — |
| Supplier Device Package | 208-RQFP (28x28) | 208-RQFP (28x28) |
| 실장 유형 | Surface Mount | Surface Mount |
| Speed Grade | -4 | — |
| 동작 온도 | 0 C to +70 C (commercial) [DATA_NEEDED: explicit -40/+85 grade info] | — |
| Process Technology | CMOS, 0.5 um (5 V SRAM-based) | 0.42 µm CMOS |
| Configuration Memory | SRAM (volatile - external configuration device required) | SRAM (volatile) |
| In-Circuit Reconfigurability | Yes (ICR via external configuration devices) | — |
| MSL 레벨 | [DATA_NEEDED: MSL rating not in provided data] | — |
| RoHS 상태 | [DATA_NEEDED: RoHS status not in provided data] | [DATA_NEEDED: RoHS status] |
| Family | — | FLEX 8000 (EPF8820) |
| Logic Cells / Elements | — | 672 |
| Registers | — | 152 |
| Maximum Operating Frequency | — | 125 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Packaging | — | Tray |
| 동작 온도 범위 | — | [DATA_NEEDED: operating temperature range] |
| In-Circuit Reconfigurability (ICR) | — | Yes (via external configuration devices) |
| Boundary-Scan Test | — | JTAG (IEEE 1149.1) |
| I/O Tolerance | — | 3.3 V / 5 V |
| Clock Networks | — | 4 dedicated low-skew global clocks |
| Lead-Free / Finish | — | [DATA_NEEDED: lead-free finish] |