EPM240GF100I5N vs EPM240GM100C5N 비교
다음의 상세 나란히 비교: EPM240GF100I5N 제조: Altera 및 EPM240GM100C5N 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Altera
EPM240GM100C5N - 192-Cell MAX II G CPLD, 4.7ns, 100-MBGA | Intel / Altera
EPM240GM100C5N ✓ 활성사양 비교
| 파라미터 | EPM240GF100I5N | EPM240GM100C5N |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 활성 | 활성 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $7.90 | $4.75 |
| Series | MAX II | — |
| Logic Elements / Blocks | 240 LE | — |
| Number of Macrocells | 192 | — |
| Maximum User I/O | 80 | — |
| Propagation Delay (tpd, max) | 4.7 ns | — |
| Programmable Type | In-System Programmable (ISP) | — |
| Non-Volatile Memory | On-chip flash configuration | — |
| Internal Supply Voltage | 1.71 V to 1.89 V (regulated on-chip) | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| 패키지 | 100-ball FBGA (FineLine BGA), 11 mm x 11 mm, 1.0 mm pitch | 100-MBGA (Micro FineLine BGA), 6 x 6 mm |
| Operating Temperature (TJ) | -40 C to +100 C | — |
| 실장 유형 | Surface Mount | Surface Mount (BGA) |
| JTAG Support | IEEE 1149.1 / IEEE 1532 compliant | — |
| Lead-Free / RoHS | Yes (lead-free, RoHS compliant) | — |
| Logic Family | CMOS | — |
| Vertical Migration Family | EPM240 / EPM570 / EPM1270 / EPM2210 in same-package footprint | — |
| Family | — | MAX II G |
| Logic Elements | — | 240 (192 macrocells) |
| User I/Os | — | 80 |
| Pin-to-Pin Delay (tPD) | — | 4.7 ns |
| Ball Pitch | — | 0.5 mm |
| Supply Voltage - Core | — | 3.3 V |
| I/O Voltage Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multiVolt) |
| Programming Interface | — | JTAG (IEEE 1149.1) - ISP |
| Configuration Memory | — | Non-volatile Flash |
| 동작 온도 | — | -40 C to +125 C |
| Lead Free / RoHS | — | Yes / Compliant |
| MSL 레벨 | — | 3 |
| Process Technology | — | CMOS, Flash-based |