EPM3064ALI44-10N vs EPM3064ATC44-10NAF 비교

다음의 상세 나란히 비교: EPM3064ALI44-10N 제조: Altera 및 EPM3064ATC44-10NAF 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM3064ALI44-10N EPM3064ATC44-10NAF
브랜드 Altera Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 NRND NRND
재고 상태 In Stock In Stock
단가 (USD) $7.80 $5.05
Series MAX 3000A MAX 3000A
Programmable Type In System Programmable (ISP) —
Number of Macrocells 64 —
Number of I/O 34 —
Logic Gates 1250 gates —
Number of Logic Elements/Blocks 4 LABs —
Propagation Delay (tPD) 10 ns (speed grade -10) —
Counter Frequency up to 227.3 MHz —
Supply Voltage - Core 3.3 V —
I/O Logic Level Support 5.0 V / 3.3 V / 2.5 V (MultiVolt) —
Programming Interface IEEE Std. 1149.1 JTAG —
동작 온도 -40 C to +85 C (Industrial) [DATA_NEEDED: industrial/commercial grade]
패키지 44-pin PLCC (J-Lead) TQFP-44 (10x10 mm)
실장 유형 Surface Mount (socketable PLCC) Surface Mount
Lead Free / RoHS Status Lead Free, RoHS Compliant —
Hot-Socketing Support Yes —
Configuration Memory CMOS EEPROM (non-volatile) —
Device Type — CPLD (Complex Programmable Logic Device)
Macro Cells — 64
Logic Elements / LABs — 4 LABs (16 macrocells per LAB)
Usable Gates — 1250
Number of I/O Pins — 34
Propagation Delay (tPD, max) — 10 ns
Supply Voltage (VCCINT) — 3.0 V to 3.6 V
I/O Voltage Tolerance — Multi-voltage (3.3 V / 2.5 V / 1.8 V capable)
Programmable Technology — EEPROM (non-volatile)
In-System Programmable — Yes (IEEE Std. 1532 compliant)
Boundary-Scan Test — Yes (IEEE Std. 1149.1 JTAG)
Pin-Locking — Yes
Lead Finish — Lead-free (NiPdAu, AF suffix)
RoHS 상태 — Compliant
Configuration Memory Cycles — 100 erase/program cycles

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