EPM3128ATC144-5 vs EPM3128ATC100-5 비교
다음의 상세 나란히 비교: EPM3128ATC144-5 제조: Altera 및 EPM3128ATC100-5 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM3128ATC144-5 | EPM3128ATC100-5 |
|---|---|---|
| 브랜드 | Altera | Intel |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $4.85 | $15.43 |
| Family | MAX 3000A | CPLD - MAX 3000A |
| Logic Family | CMOS | CMOS |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Number of Macrocells | 128 | — |
| Number of Logic Array Blocks (LABs) | 8 | — |
| Number of User I/Os | 96 | — |
| Device System Gates | 2500 | — |
| Product Terms per Macrocell | 32 | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| Maximum Internal Frequency | 192.3 MHz | — |
| Number of Global Clocks | 2 | — |
| Program Memory Type | EEPROM (non-volatile) | EEPROM |
| Supply Voltage (Core) | 3.3 V | — |
| Multi-Volt I/O Voltage | 2.5 V / 3.3 V / 5.0 V tolerant | — |
| In-System Programmability | Yes (IEEE Std. 1532 compliant) | Yes, IEEE Std. 1532 compliant |
| JTAG / IEEE 1149.1 | Yes (boundary-scan + ISP) | — |
| 동작 온도 | 0C to +70C (Commercial) | 0 °C to 70 °C (Commercial) |
| 패키지 | TQFP-144 (Plastic, 1.0 mm pitch, 22x22 mm) | 100-pin TQFP (Fine Line) |
| Process Technology | 0.30 um CMOS EEPROM, 4 metal layers | CMOS EEPROM |
| RoHS 상태 | Not Compliant (per Arrow distributor listing) | [DATA_NEEDED: RoHS status] |
| ECCN | EAR99 | — |
| HTS Code | 8542.31.00.55 | — |
| Series | — | MAX 3000A |
| Macrocells | — | 128 |
| Usable Gates | — | 2,500 |
| User I/Os | — | 80 |
| Dedicated Inputs | — | 4 |
| Pin-to-Pin Delay (tpd) | — | 5 ns (commercial); 7.5 ns |
| Maximum Frequency (fCNT) | — | 192.3 MHz |
| Supply Voltage (VCCINT/VCCIO) | — | 3.3 V |
| Output Drive Voltage | — | 2.5 V or 3.3 V (programmable) |
| Input Tolerance | — | 2.5 V, 3.3 V, 5.0 V tolerant |
| JTAG Boundary Scan | — | Yes, IEEE Std. 1149.1 |
| 실장 유형 | — | Surface Mount |