EPM3128ATC144-7N vs EPM3128ATC144-10 비교

다음의 상세 나란히 비교: EPM3128ATC144-7N 제조: Altera 및 EPM3128ATC144-10 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM3128ATC144-7N EPM3128ATC144-10
브랜드 Altera Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 활성 활성
재고 상태 In Stock In Stock
단가 (USD) $9.25 $6.20
Series MAX 3000A —
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Architecture EEPROM-based, MAX architecture —
Number of Macrocells 128 —
Number of Usable Gates Up to 10,000 —
User I/Os 96 96
핀 수 144 —
패키지 TQFP-144 (20 x 20 mm, 0.5 mm pitch) 144-pin TQFP (TQ144)
Logic Family CMOS —
Propagation Delay (tPD) 7.5 ns (pin-to-pin, -7 speed grade) 10 ns (speed grade -10)
Counter Frequency Up to 227.3 MHz —
Core Supply Voltage (VCCINT) 3.3 V —
I/O Supply Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V (MultiVolt) —
동작 온도 0 °C to +70 °C (commercial) 0C to +70C (commercial)
In-System Programmability (ISP) Yes, via JTAG (IEEE 1149.1) —
PCI Compliance Compatible with PCI Local Bus Specification Rev. 2.2 —
실장 유형 Surface Mount (SMD/SMT) Surface Mount
RoHS 상태 Lead-free (-7N suffix indicates Pb-free finish) Compliant
Family — MAX 3000A
Macro Cells — 128
Usable Gates — 2,500 (typical)
Logic Elements / LABs — 4 Logic Array Blocks
Counter Frequency (fCNT) — Up to 227.3 MHz
Supply Voltage (VCCINT) — 3.3 V
MultiVolt I/O Interface — 1.5V / 1.8V / 2.5V / 3.3V
In-System Programmability — IEEE Std. 1532 compliant
Boundary-Scan Test — IEEE Std. 1149.1 (JTAG)
Configuration Memory — EEPROM (non-volatile, instant-on)
Lead-Free — Yes

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