EPM3128ATI144-7N vs EPM3128ATI144-10 비교
다음의 상세 나란히 비교: EPM3128ATI144-7N 제조: Altera 및 EPM3128ATI144-10 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Altera
EPM3128ATI144-7N - 128 Macrocell CPLD, 129.9MHz, 3.3V | Altera MAX 3000A
EPM3128ATI144-7N ⚠ 최종 구매Altera
EPM3128ATI144-10 - MAX 3000A CPLD 128 Macro 98 I/O TQFP-144 | Intel/Altera
EPM3128ATI144-10 Nrnd사양 비교
| 파라미터 | EPM3128ATI144-7N | EPM3128ATI144-10 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 최종 구매 | NRND |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $9.95 | $10.85 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Logic Capacity | 2.5K gates | — |
| Macrocells | 128 | — |
| Maximum Frequency (fMAX) | 129.9 MHz | — |
| Pin-to-Pin Propagation Delay | 7.5 ns (speed grade -7) | — |
| User I/O Pins | 96 | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V / 2.5 V / 1.8 V | — |
| Programmable Logic Technology | CMOS EEPROM | — |
| Programming Interface | JTAG (IEEE Std 1149.1) in-system programmable | IEEE 1149.1 JTAG (ISP) |
| 패키지 | 144-pin TQFP | TQFP-144 (FINE LINE) |
| Terminal Pitch | 0.5 mm | — |
| JEDEC Package Code | S-PQFP-G144 | — |
| 동작 온도 | -40C to +85C (industrial) | -40C to +85C (Industrial) |
| MultiVolt I/O | Yes (interfaces with 5.0V/3.3V/2.5V/1.8V logic) | — |
| Usable Gates | — | 2,500 |
| Macro Cells | — | 128 |
| Logic Array Blocks (LABs) | — | 8 |
| User I/Os | — | 98 |
| 핀 수 | — | 144 |
| Supply Voltage (VCCINT) | — | 3.3 V |
| Pin-to-Pin Delay | — | 10 ns (speed grade -10) |
| Counter Frequency | — | 98 MHz typical |
| Logic Family | — | CMOS, EEPROM-based |
| PCI Compliance | — | PCI Local Bus Spec Rev 2.2 (speed grades -4 to -10) |
| 실장 유형 | — | Surface Mount (Gull-Wing TQFP) |
| RoHS 상태 | — | Compliant (lead-free TQFP) |