EPM3128ATI144-7N vs EPM3128ATI144-10 对比
详细并排对比 EPM3128ATI144-7N 出自 Altera 和 EPM3128ATI144-10 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM3128ATI144-7N - 128 Macrocell CPLD, 129.9MHz, 3.3V | Altera MAX 3000A
EPM3128ATI144-7N ⚠ 最后一次采购Altera
EPM3128ATI144-10 - MAX 3000A CPLD 128 Macro 98 I/O TQFP-144 | Intel/Altera
EPM3128ATI144-10 Nrnd规格对比
| 参数 | EPM3128ATI144-7N | EPM3128ATI144-10 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.95 | $10.85 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Logic Capacity | 2.5K gates | — |
| Macrocells | 128 | — |
| Maximum Frequency (fMAX) | 129.9 MHz | — |
| Pin-to-Pin Propagation Delay | 7.5 ns (speed grade -7) | — |
| User I/O Pins | 96 | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V / 2.5 V / 1.8 V | — |
| Programmable Logic Technology | CMOS EEPROM | — |
| Programming Interface | JTAG (IEEE Std 1149.1) in-system programmable | IEEE 1149.1 JTAG (ISP) |
| 封装 | 144-pin TQFP | TQFP-144 (FINE LINE) |
| Terminal Pitch | 0.5 mm | — |
| JEDEC Package Code | S-PQFP-G144 | — |
| 工作温度 | -40C to +85C (industrial) | -40C to +85C (Industrial) |
| MultiVolt I/O | Yes (interfaces with 5.0V/3.3V/2.5V/1.8V logic) | — |
| Usable Gates | — | 2,500 |
| Macro Cells | — | 128 |
| Logic Array Blocks (LABs) | — | 8 |
| User I/Os | — | 98 |
| 引脚数量 | — | 144 |
| Supply Voltage (VCCINT) | — | 3.3 V |
| Pin-to-Pin Delay | — | 10 ns (speed grade -10) |
| Counter Frequency | — | 98 MHz typical |
| Logic Family | — | CMOS, EEPROM-based |
| PCI Compliance | — | PCI Local Bus Spec Rev 2.2 (speed grades -4 to -10) |
| 安装类型 | — | Surface Mount (Gull-Wing TQFP) |
| RoHS 状态 | — | Compliant (lead-free TQFP) |