EPM3512AFI256-7 vs EPM3512AFC256-10N 비교
다음의 상세 나란히 비교: EPM3512AFI256-7 제조: Altera 및 EPM3512AFC256-10N 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM3512AFI256-7 | EPM3512AFC256-10N |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $15.95 | $43.22 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 512 | 512 |
| Usable Gates | 10,000 | 10000 |
| Logic Array Blocks (LABs) | 32 (16 macrocells each) | [DATA_NEEDED: number of LABs] |
| User I/O Pins | 208 | 208 |
| Pin-to-Pin Delay (tPD) | 7.5 ns | 10 ns |
| Maximum Operating Frequency | [DATA_NEEDED: fMAX value] | — |
| Supply Voltage VCCINT | 3.3 V | — |
| MultiVolt I/O Voltage | 1.8 V / 2.5 V / 3.3 V / 5.0 V tolerant | — |
| Process Technology | 0.30 µm CMOS EEPROM | — |
| 패키지 | 256-ball FBGA (Fine-Pitch BGA), 17 mm × 17 mm, 1.0 mm pitch | 256-ball FBGA (17 mm x 17 mm) |
| In-System Programmability | IEEE Std. 1532 compliant via JTAG | — |
| Boundary-Scan Test | IEEE Std. 1149.1 (JTAG) | — |
| Operating Temperature (Industrial) | -40 °C to +85 °C | — |
| RoHS 상태 | [DATA_NEEDED: confirm from data] | [DATA_NEEDED: RoHS status] |
| 실장 유형 | Surface Mount (BGA) | Surface Mount (BGA) |
| Operating Frequency (fMAX) | — | [DATA_NEEDED: fMAX MHz] |
| Setup Time (tSU) | — | 4.5 ns |
| VCCINT (Core Supply) | — | 3.3 V |
| VCCIO (I/O Supply) | — | 3.3 V or 2.5 V |
| Technology | — | CMOS EEPROM-based, non-volatile |
| Operating Temperature (Commercial) | — | 0 C to +70 C |
| ISP Interface | — | IEEE Std. 1149.1 JTAG, IEEE Std. 1532 |
| MSL 레벨 | — | [DATA_NEEDED: MSL rating] |