EPM3512AQC208-7N vs EPM3512AQC208-10S 비교
다음의 상세 나란히 비교: EPM3512AQC208-7N 제조: Altera 및 EPM3512AQC208-10S 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM3512AQC208-7N | EPM3512AQC208-10S |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 최종 구매 | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $41.41 | $9.75 |
| Family | MAX 3000A | MAX 3000A |
| Logic Capacity | 512 macrocells, 10,000 usable gates | — |
| Logic Array Blocks (LABs) | 32 | 32 (16 macrocells each) |
| Macrocells per LAB | 16 | — |
| User I/Os | 172 | 208 |
| Propagation Delay (tPD) | 7.5 ns | — |
| Maximum Frequency (fCNT) | 116.3 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V (3.0 V to 3.6 V) | — |
| I/O Bank Count | 4 (MultiVolt) | — |
| Supported I/O Standards | 1.8 V / 2.5 V / 3.3 V LVTTL/LVCMOS | — |
| Process Technology | 0.30 µm CMOS EEPROM | EEPROM-based CMOS |
| Configuration | Non-volatile EEPROM, in-system programmable (ISP) | — |
| JTAG Interface | IEEE 1149.1 BST + IEEE 1532 ISP | — |
| 패키지 | 208-Pin PQFP / FQFP-208 (Plastic Quad Flat Pack, gull-wing) | 208-pin FineLine BGA-256 |
| 동작 온도 | 0 °C to +70 °C (commercial) | 0C to +70C (commercial) |
| RoHS 상태 | Compliant | [DATA_NEEDED: rohs_status] |
| Speed Grade | -7 | -10 (tPD1 = 7.5 ns) |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 512 |
| Usable Gates | — | 1750 |
| Propagation Delay (tPD1) | — | 7.5 ns (pin-to-pin) |
| Supply Voltage - VCCINT (internal) | — | 3.3 V |
| Supply Voltage - VCCIO (I/O) | — | 2.5 V, 3.3 V, or 5.0 V (MultiVolt) |
| Programming Technology | — | CMOS EEPROM |
| In-System Programmability (ISP) | — | Yes (IEEE Std. 1149.1 JTAG) |
| PCI Compliance | — | Yes (PCI Local Bus Specification Rev 2.2) |
| Boundary-Scan (JTAG) | — | Yes (1149.1 compliant) |
| Program/Erase Endurance | — | 100 cycles minimum |
| Logic Family | — | CMOS |