EPM3512AQC210-10 vs EPM3256AQC208-10 비교
다음의 상세 나란히 비교: EPM3512AQC210-10 제조: Altera 및 EPM3256AQC208-10 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Altera
EPM3256AQC208-10 - MAX 3000A CPLD 256 Macrocells 10ns 208-PQFP | Intel / Altera
EPM3256AQC208-10 Obsolete사양 비교
| 파라미터 | EPM3512AQC210-10 | EPM3256AQC208-10 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | NRND | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $25.40 | $15.20 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Macrocells | 512 | — |
| Logic Array Blocks (LABs) | 16 (32 macrocells each) | — |
| Maximum User I/O Pins | 172 | — |
| Speed Grade | -10 (10 ns tPD) | — |
| Pin-to-Pin Propagation Delay (tPD1, max) | 10 ns | — |
| Maximum Operating Frequency (fCNT) | 125 MHz | — |
| Supply Voltage - Core (VCCINT) | 3.3 V | — |
| Supply Voltage - I/O (VCCIO) | 3.3 V or 2.5 V | — |
| Input Voltage Tolerance | 5.0 V tolerant | — |
| Programmable Technology | EEPROM (in-system programmable) | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | IEEE 1149.1 JTAG (ISP) |
| 패키지 | PQFP-210 | 208-BFQFP (PQFP, Gull Wing) |
| 동작 온도 | 0C to +70C (commercial) | 0 °C to +70 °C (Commercial) |
| 실장 유형 | Surface Mount | Surface Mount |
| RoHS 상태 | [DATA_NEEDED: rohs_compliance_status] | [DATA_NEEDED: RoHS status] |
| Logic Family | — | CMOS (EEPROM-based) |
| Macrocells | — | 256 |
| Usable Gates | — | 5,000 |
| User I/Os | — | 161 |
| 핀 수 | — | 208 |
| Pin-to-Pin Propagation Delay | — | 10 ns |
| Counter Frequency (max) | — | 227.3 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Tolerance | — | MultiVolt 2.5 V / 3.3 V / 5.0 V tolerant |
| PCI-SIG Compliance | — | Yes (speed grades -4, -5, -6, -7, -10) |
| Global Clock Networks | — | 4 (CLK, CLR, OE, GCLK) |