EPM5128JC-2 vs EPM5128JC-1 비교
다음의 상세 나란히 비교: EPM5128JC-2 제조: Altera 및 EPM5128JC-1 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM5128JC-2 | EPM5128JC-1 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $21.75 | $24.95 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | UV-Erasable Programmable Logic Device (PLD) | Erasable Programmable Logic Device (EPLD/CPLD) |
| Macrocells | 128 | 128 |
| Dedicated Inputs | 7 | — |
| Propagation Delay (tPD) | 45 ns (max) | — |
| Maximum Counter Frequency (fCNT) | 50 MHz | — |
| Input Setup Time (tSU) | 7.5 ns | — |
| Output Drive Current (IOH/IOL) | 12 mA DC | — |
| Process Technology | CMOS | — |
| 패키지 | 68-pin CQCC (Ceramic Quad Flat Pack), windowed | 68-pin CQCCJ (Windowed Ceramic J-Lead Chip Carrier) |
| 실장 유형 | Surface Mount | Surface Mount |
| 동작 온도 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: temperature grade] |
| 공급 전압 | 5 V (nominal) | — |
| Program/Erase Method | UV (ceramic window) | — |
| Erase/Program Cycles | [DATA_NEEDED: minimum erase/program cycles] | — |
| RoHS 상태 | Non-compliant (ceramic windowed package contains lead-bearing solder) | non_compliant (ceramic windowed package) |
| Logic Family | TTL-compatible I/O | — |
| Usable Gates | — | 2,500 |
| Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count] |
| Maximum Operating Frequency | — | 62.5 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 40 ns |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| Technology | — | CMOS, UV-erasable EPROM |
| Programming Interface | — | JTAG / Altera dedicated programmer |
| Configuration Memory | — | Non-volatile EPROM (UV-erasable) |
| 수명 주기 상태 | — | Obsolete - last-time-buy inventory only |