EPM5130LC vs EPM5130WC-2 비교
다음의 상세 나란히 비교: EPM5130LC 제조: Altera 및 EPM5130WC-2 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM5130LC | EPM5130WC-2 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $15.60 | $62.00 |
| Series | MAX 5000 | — |
| Family | MAX 5000 (EPM51xx) | — |
| Macrocells | 128 | — |
| Logic Array Blocks (LABs) | 8 | — |
| User I/O Pins | 48 | — |
| Total Inputs (Dedicated + I/O) | 68 | — |
| Dedicated Inputs | 19 | 19 |
| Propagation Delay (tPD) | 55 ns | 45 ns |
| Maximum Internal Clock Frequency | 50 MHz | — |
| Global Clock Inputs | 1 | — |
| Configuration Technology | UV-Erasable / OTP EPROM | — |
| Process Technology | CMOS (0.7 um EPROM) | CMOS |
| Supply Voltage (VCC) | 4.5 V to 5.5 V | 4.75 V to 5.25 V |
| I/O Standard | TTL-compatible | — |
| 패키지 | JLCC-68 (J-Lead Ceramic Chip Carrier) | — |
| 동작 온도 | [DATA_NEEDED: commercial/industrial/military grade] | 0 °C to 70 °C (Commercial) |
| 실장 유형 | Surface Mount | Surface Mount |
| RoHS 상태 | Non-compliant (ceramic JLCC, contains lead) | [DATA_NEEDED: RoHS status] |
| Device Family | — | MAX 5000 |
| Product Type | — | UV-Erasable PLD (CPLD) |
| Macrocell Count | — | 128 |
| User I/O Lines | — | 48 |
| Total Inputs (I/O + dedicated) | — | 68 |
| Package Type | — | 100-terminal Ceramic CQFP (R-CQFP-G100), windowed, gull-wing |
| Terminal Pitch | — | 0.650 mm |
| Configuration Memory | — | UV-erasable CMOS EEPROM cells |
| Speed Grade | — | -2 (45 ns) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Logic Elements | — | AND/OR array with programmable macrocell register |