EPM5192AGC-15 vs EPM5192AJC-25 비교
다음의 상세 나란히 비교: EPM5192AGC-15 제조: Altera 및 EPM5192AJC-25 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM5192AGC-15 | EPM5192AJC-25 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $27.80 | $8.20 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Series | MAX 5000 | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks | 16 (typical for 192-macrocell MAX 5000) | — |
| Maximum User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | — |
| Total Inputs | 72 | — |
| Propagation Delay (tPD) | 15 ns (pin-to-pin, -15 speed grade) | 25 ns |
| Supply Voltage (VCC) | 5 V | — |
| Technology | CMOS, UV-erasable EPROM | — |
| 패키지 | Ceramic Pin Grid Array (PGA) | PLCC-68 (windowed ceramic, AJC) |
| Programming Method | UV erase + EPROM program (via Altera programmer) | — |
| 동작 온도 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: exact operating temperature range] |
| RoHS 상태 | [DATA_NEEDED: RoHS status - legacy ceramic PGA typically non-compliant] | [DATA_NEEDED: RoHS compliance status] |
| 수명 주기 상태 | Obsolete / Last Time Buy (per Altera legacy product list) | — |
| Family | — | MAX 5000 EPLD |
| Manufacturer | — | Altera (now Intel PSG) |
| 핀 수 | — | 68 |
| 실장 유형 | — | Surface Mount |
| 공급 전압 | — | 5 V (typical) |
| Logic Blocks | — | MAX 5000 LABs (Logic Array Blocks) |
| Programmable Pins | — | [DATA_NEEDED: number of user I/O pins] |
| Erasure Method | — | UV-erasable (windowed ceramic package) |
| Programming Technology | — | EPROM (non-volatile) |
| Military Grade | — | Likely MIL-STD-883 processing per 'J' suffix in AJC marking (verify) |