EPM5192AGC-15 vs EPM5192AJI84-15 비교
다음의 상세 나란히 비교: EPM5192AGC-15 제조: Altera 및 EPM5192AJI84-15 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM5192AGC-15 | EPM5192AJI84-15 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $27.80 | $27.80 |
| Product Type | EPLD (Erasable Programmable Logic Device) | UV-Erasable / OTP Complex PLD |
| Series | MAX 5000 | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks | 16 (typical for 192-macrocell MAX 5000) | — |
| Maximum User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | — |
| Total Inputs | 72 | — |
| Propagation Delay (tPD) | 15 ns (pin-to-pin, -15 speed grade) | 15 ns |
| Supply Voltage (VCC) | 5 V | 4.5 V to 5.5 V (nominal 5 V) |
| Technology | CMOS, UV-erasable EPROM | — |
| 패키지 | Ceramic Pin Grid Array (PGA) | — |
| Programming Method | UV erase + EPROM program (via Altera programmer) | UV erase + EPROM program via standard Altera programmer |
| 동작 온도 | [DATA_NEEDED: operating temperature range] | -40 °C to +85 °C (Industrial, 'I' suffix) |
| RoHS 상태 | [DATA_NEEDED: RoHS status - legacy ceramic PGA typically non-compliant] | unknown |
| 수명 주기 상태 | Obsolete / Last Time Buy (per Altera legacy product list) | — |
| Device Family | — | MAX 5000 EPLD |
| Logic Array Blocks (LABs) | — | 16 |
| User I/O Pins | — | 84 |
| Process Technology | — | CMOS EPROM (UV-erasable) |
| Package Type | — | 84-pin JLCC (J-Leaded Ceramic Chip Carrier) with quartz window |
| 실장 유형 | — | Through-Hole (SMD socket-compatible) |
| Design Tool Support | — | MAX+PLUS II (legacy); not supported by modern Quartus Prime |
| Lead-Free | — | unknown |
| 할로겐 프리 | — | unknown |
| Functional Equivalent (Plastic OTP) | — | EPM5192AJC84-15 (windowless plastic JLCC, same die) |