EPM5192ALM84-20 vs EPM5192ALC84-20 비교
다음의 상세 나란히 비교: EPM5192ALM84-20 제조: Altera 및 EPM5192ALC84-20 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM5192ALM84-20 | EPM5192ALC84-20 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $10.25 | $19.40 |
| Family | MAX 5000 | — |
| Device Type | UV-Erasable/OTP Complex PLD (CPLD) | UV-Erasable/OTP Complex PLD (EPLD) |
| Macrocells | 192 | 192 |
| User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | — |
| Total Inputs | 71 (64 I/O + 7 dedicated) | — |
| 최대 클록 주파수 | 66.7 MHz | — |
| Propagation Delay (tPD) | 33 ns | — |
| Process Technology | CMOS | CMOS |
| 패키지 | 84-pin PQCC (PLCC), J-Lead, surface-mount | 84-pin PLCC (Plastic Leaded Chip Carrier) |
| Programmable Security Bit | Yes | — |
| Logic Voltage Compatibility | 5 V TTL | — |
| Configuration Memory | EPROM (UV-erasable, windowless in this package) | EPROM (UV-erasable) |
| 동작 온도 | [DATA_NEEDED: commercial/industrial/military grade] | — |
| RoHS 상태 | unknown (legacy Altera part) | [DATA_NEEDED: RoHS status not in provided web data] |
| Series | — | Altera MAX 5000 |
| Speed Grade | — | -20 (20 ns pin-to-pin delay) |
| Terminal Pitch | — | 1.270 mm |
| Terminal Form | — | J-bend |
| Package Code | — | QCCJ (PLCC-84) |
| Package Shape | — | Square |
| Temperature Grade | — | Commercial |
| Programming Method | — | UV-erase + EPROM (One-Time-Programmable option) |
| Logic Family | — | MAX 5000 EPLD |
| I/O Compatibility | — | TTL-compatible |
| 실장 유형 | — | Surface Mount (PLCC socket-compatible) |