EPM5192C-2 vs EPM5192JC-1 비교
다음의 상세 나란히 비교: EPM5192C-2 제조: Altera 및 EPM5192JC-1 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM5192C-2 | EPM5192JC-1 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $13.20 | $22.40 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | Complex Programmable Logic Device (CPLD) | CPLD - Complex Programmable Logic Device |
| Macrocells | 192 | 192 |
| User I/O Pins | 64 | 84 |
| Logic Array Blocks (LABs) | 12 | — |
| Dedicated Inputs | 7 | — |
| External Clock Inputs | 1 | — |
| Propagation Delay (PIA, typical) | 45 ns | — |
| Maximum Operating Frequency | 50 MHz | — |
| Process Technology | CMOS | — |
| Configuration Memory | EEPROM (non-volatile) | UV-EPROM (erasable under UV lamp) |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | — |
| Speed Grade | -2 | — |
| Programming Interface | JTAG / Altera MAX+ programming | Altera MAX programming interface (parallel, pre-JTAG for this family) |
| RoHS 상태 | unknown | — |
| Lead-Free | unknown | — |
| Technology | — | CMOS, UV-Erasable / OTP |
| Usable Gates | — | 3750 |
| Propagation Delay (tPD) | — | 40 ns (speed grade -1) |
| Maximum Internal Frequency (fMAX) | — | 62.5 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Package Type | — | 84-pin Ceramic Quad Flat Pack (CQFP), windowed |
| JEDEC Package Code | — | S-CQCC-J84 |
| 동작 온도 | — | 0 C to +70 C (commercial) |
| Process | — | CMOS EPROM |
| I/O Standard | — | TTL/CMOS 5 V compatible |