EPM7128ATC100-10 vs EPM7128AETI100-7 비교

다음의 상세 나란히 비교: EPM7128ATC100-10 제조: Altera 및 EPM7128AETI100-7 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM7128ATC100-10 EPM7128AETI100-7
브랜드 Altera Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete Obsolete
재고 상태 In Stock In Stock
단가 (USD) $4.95 $30.10
Product Type CPLD (Complex Programmable Logic Device) —
Family MAX 7000A MAX 7000A
Architecture Multiple Array MatriX (MAX) —
Macrocells 128 128
Logic Array Blocks (LABs) 4 —
Usable Gates 2.5K 2,500
User I/O Pins 68 —
Pin-to-Pin Logic Delay 4.5 ns —
Counter Frequency (max) 227.3 MHz —
Speed Grade -10 (10 ns) —
Core Supply Voltage 3.3 V —
I/O Logic Level Support 5.0 V / 3.3 V / 2.5 V (MultiVolt) —
Program Memory EEPROM (non-volatile) —
In-System Programmability Yes (IEEE 1149.1 JTAG) —
패키지 100-pin TQFP (TC100) 100-pin TQFP (1.0 mm pitch, 14 x 14 mm)
실장 유형 Surface Mount Surface Mount
동작 온도 0C to +70C (commercial) -40 C to +85 C (Industrial)
RoHS 상태 [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: confirm RoHS for non-N suffix]
Device Type — CPLD (Complex Programmable Logic Device)
User I/Os — 84
Logic Blocks (LABs) — 8
Pin-to-Pin Delay (tPD) — 7.5 ns
Maximum Counter Frequency — 129.9 MHz
Supply Voltage - Core (VCCINT) — 3.3 V
I/O Bank Supply (VCCIO) — 2.5 V / 3.3 V / 5 V (MultiVolt)
Configuration Memory — EEPROM (non-volatile, in-system programmable)
JTAG Support — Yes (IEEE 1149.1 boundary-scan)
Global Clock Inputs — 4 dedicated
Lead-Free Version (MPN Suffix) — -N suffix denotes lead-free (e.g., EPM7128AETI100-7N)

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