EPM7128SQC100-10N vs EPM7128AETC100-10N 비교

다음의 상세 나란히 비교: EPM7128SQC100-10N 제조: Altera 및 EPM7128AETC100-10N 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM7128SQC100-10N EPM7128AETC100-10N
브랜드 Altera Intel
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 활성 Obsolete
재고 상태 In Stock In Stock
단가 (USD) $14.95 $9.95
Family MAX 7000 MAX 7000AE
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macro Cells 128 —
Usable Gates 2,500 2500
Logic Array Blocks (LABs) 8 (16 macro cells each) —
User I/O Pins 84 —
Propagation Delay (tPD) 10 ns —
Maximum Frequency 100 MHz [DATA_NEEDED: maximum toggle frequency]
Supply Voltage (VCCINT) 5 V (4.75 V to 5.25 V) —
I/O Voltage Tolerance 3.3 V or 5 V (MultiVolt interface) —
패키지 100-pin PQFP (BQFP) TQFP-100
Configuration Memory EEPROM (non-volatile) —
Programming Interface JTAG (IEEE Std 1149.1), 4-pin —
동작 온도 -40C to +85C (industrial) 0C to +70C (commercial)
실장 유형 Surface Mount Surface Mount
Lead-Free / RoHS Status Lead-free (N suffix) —
Architecture Generation Second-generation MAX —
Series — EPM7128AE
Macrocells — 128
Logic Array Blocks — 16
User I/Os — 84
Supply Voltage (Core) — 3.3 V
I/O Tolerance — 5.0 V tolerant
Pin-to-Pin Delay (tPD) — 10 ns
Speed Grade — -10
Programming — JTAG (IEEE 1149.1) ISP / EEPROM
Lead-Free / RoHS — Yes (N suffix)
Process Technology — CMOS EEPROM
Architecture — Multiple Array MatriX (MAX) - 2nd generation
PCI Compliance — Yes (33 MHz, -10 grade per PCI SIG 2.2)

데이터시트 & 자료

모든 제품 보기 BOM 생성 견적 요청