EPM7128STC100-10N vs EPM7128STC100-6N 비교
다음의 상세 나란히 비교: EPM7128STC100-10N 제조: Altera 및 EPM7128STC100-6N 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Altera
EPM7128STC100-10N - MAX 7000S CPLD 128-Macrocell 10ns TQFP-100 | Altera
EPM7128STC100-10N NrndAltera
EPM7128STC100-6N - MAX 7000S 128-Macro-Cell CPLD | Altera | TQFP-100
EPM7128STC100-6N Obsolete사양 비교
| 파라미터 | EPM7128STC100-10N | EPM7128STC100-6N |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | NRND | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $9.30 | $10.50 |
| Family | MAX 7000S | MAX 7000S |
| Product Type | CPLD - Complex Programmable Logic Device | — |
| Macrocells | 128 | — |
| Usable Gates | 2,500 | 2,500 |
| Logic Array Blocks (LABs) | 8 (16 macrocells each) | — |
| User I/Os | 84 | 84 |
| Propagation Delay (tPD) | 10 ns | 6 ns |
| Internal Frequency (fMAX) | 100 MHz | — |
| Supply Voltage (VCCINT) | 5 V | — |
| I/O Voltage (VCCIO) | 3.3 V or 5 V (MultiVolt) | — |
| Process Technology | CMOS EEPROM | CMOS EEPROM |
| 패키지 | 100-pin TQFP (14 x 14 x 1 mm) | — |
| 동작 온도 | 0 C to +70 C (commercial) | 0C to +70C (Commercial) |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| 실장 유형 | Surface Mount | Surface Mount |
| RoHS 상태 | Compliant (Pb-free "N" suffix) | Non-Compliant (lead-bearing package) |
| Lead-Free | Yes | — |
| Macro Cells | — | 128 |
| Logic Family | — | CMOS |
| 핀 수 | — | 100 |
| Package Type | — | TQFP-100 |
| Maximum Internal Frequency | — | 147.1 MHz |
| Internal Counter Frequency | — | 250 MHz |
| Pin-to-Pin Delay | — | 4.5 ns |
| Supply Voltage (VCCIO) | — | 5 V |
| Programmability | — | In-System Programmable (ISP) via JTAG |
| JTAG Support | — | IEEE 1149.1 Boundary Scan |