EPM7256AETC100-10N vs EPM7256AETC100-7 비교
다음의 상세 나란히 비교: EPM7256AETC100-10N 제조: Altera 및 EPM7256AETC100-7 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Altera
EPM7256AETC100-10N - 256-Macro MAX 7000A CPLD, 10ns, TQFP-100 | Intel (Altera)
EPM7256AETC100-10N ObsoleteIntel
EPM7256AETC100-7 - 256-Macrocell MAX 7000A CPLD, 7.5ns TQFP-100 | Intel
EPM7256AETC100-7 Obsolete사양 비교
| 파라미터 | EPM7256AETC100-10N | EPM7256AETC100-7 |
|---|---|---|
| 브랜드 | Altera | Intel |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $13.10 | $10.45 |
| Family | MAX 7000A | MAX 7000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Macro Cells | 256 | — |
| Usable Gates | 5,000 | 5,000 |
| Maximum User I/Os | 84 | — |
| Logic Elements / LABs | 16 Logic Array Blocks | — |
| Pin-to-Pin Logic Delay | 10 ns | — |
| Maximum Operating Frequency | 125 MHz | 126.6 MHz |
| Supply Voltage (Core) | 3.3 V | — |
| MultiVolt I/O Support | 2.5 V / 3.3 V / 5.0 V | — |
| Programmability | EEPROM, in-system via JTAG (IEEE 1149.1) | — |
| 패키지 | 100-pin TQFP | TQFP-100 (ET100) |
| 실장 유형 | Surface Mount | Surface Mount |
| 동작 온도 범위 | 0C to +70C (commercial) [DATA_NEEDED: explicit grade from datasheet] | — |
| Process Technology | 0.30 µm EEPROM | — |
| Dedicated Inputs | 4 (global clock / clear / OE) | — |
| RoHS 상태 | [DATA_NEEDED: not confirmed in provided data] | Unknown - part marked obsolete |
| Lead-Free / Pb-Free | [DATA_NEEDED: not confirmed in provided data] | — |
| Series | — | EPM7256 |
| Technology | — | EEPROM-based, CMOS |
| Macrocells | — | 256 |
| Number of I/Os | — | 84 |
| Number of Logic Array Blocks (LABs) | — | 16 |
| Core Supply Voltage | — | 3.3 V |
| Pin-to-Pin Delay (tPD) | — | 7.5 ns |
| 동작 온도 | — | 0C to +70C (Commercial) |
| Programming Interface | — | JTAG (IEEE 1149.1) - In-System Programmable |
| 메모리 유형 | — | EEPROM (non-volatile) |