EPM7256SQC208-15 vs EPM7256SQC208-7 비교
다음의 상세 나란히 비교: EPM7256SQC208-15 제조: Altera 및 EPM7256SQC208-7 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM7256SQC208-15 | EPM7256SQC208-7 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | NRND | NRND |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $3.65 | $0.00 |
| Family | MAX 7000S | — |
| Series | EPM7256 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 256 | 256 |
| Logic Array Blocks (LABs) | 16 | — |
| Usable Gates | 5000 | 5,000 |
| User I/O Pins | 164 | 164 |
| Pin-to-Pin Delay (tPD) | 15 ns | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | — |
| 동작 온도 범위 | 0 C to +70 C (Commercial) | Commercial (0C to +70C) |
| 패키지 | 208-pin PQFP (28x28 mm) | 208-pin PQFP (28 x 28 mm, 0.5 mm pitch) |
| 실장 유형 | Surface Mount | Surface Mount |
| Programmable Power Mode | Yes (per-macrocell turbo-bit) | — |
| JTAG (IEEE 1149.1) Boundary-Scan | Yes | — |
| In-System Programmability (ISP) | Yes | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| RoHS 상태 | Contains lead / RoHS non-compliant (per third-party listing) | [DATA_NEEDED: RoHS status] |
| Lead-Free Status | Contains lead | — |
| Device Family | — | MAX 7000S (EPM7256S) |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Operating Frequency (fMAX) | — | 128.2 MHz |
| Supply Voltage (VCC) | — | 5.0 V |
| Configuration Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Minimum DC Input Voltage | — | -0.5 V |
| Input Undershoot Tolerance | — | -2.0 V for <100 mA, <20 ns |
| Speed Grade | — | -7 (7.5 ns) |
| MSL 레벨 | — | [DATA_NEEDED: MSL level] |
| Logic Levels | — | 5.0 V CMOS/TTL compatible |