EPM9320LC84-15 vs EPM9320LC84-10 비교

다음의 상세 나란히 비교: EPM9320LC84-15 제조: Intel 및 EPM9320LC84-10 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM9320LC84-15 EPM9320LC84-10
브랜드 Intel Intel
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete NRND
재고 상태 In Stock In Stock
단가 (USD) $17.95 $84.96
Family MAX 9000 MAX 9000 EPLD
Series EPM9320 —
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 320 320
Usable Gates 6,000 6000 (typical)
Logic Array Blocks (LABs) 20 16
Propagation Delay (tPD) 15 ns (max) —
최대 클록 주파수 117.6 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V (5.0 V nominal) 5.0 V (typical, see datasheet)
Programmability 5.0 V in-system programmable (ISP) via JTAG —
JTAG Interface IEEE Std. 1149.1 boundary-scan compliant —
패키지 84-pin PLCC (Plastic Leaded Chip Carrier) 84-pin PLCC (JEDEC MO-047)
실장 유형 Surface Mount Surface Mount (PLCC socket also common)
동작 온도 -40C to +85C (commercial) [DATA_NEEDED: exact grade] 0C to +70C (commercial) [DATA_NEEDED: exact grade suffix]
Technology CMOS EEPROM-based, third-generation Multiple Array MatriX (MAX) —
Built-in Pull-up Resistors Yes, on every I/O pin —
Architecture Feature Pin-locking across design iterations —
RoHS 상태 [DATA_NEEDED: confirm from manufacturer] ROHS3 Compliant (per fpgalink listing)
Device — EPM9320
Maximum User I/O Pins — 168 (varies by package)
Pin-to-Pin Logic Delay (tPD) — 10 ns
Maximum Frequency (fCNT) — [DATA_NEEDED: fCNT in MHz]
Process Technology — 0.7 µm CMOS EEPROM/UV-EPROM
Programming Interface — JTAG (IEEE 1149.1) boundary-scan, Altera ByteBlaster compatible
Configuration — Non-volatile EEPROM (instant-on, no boot PROM)
습도 민감도 레벨 (MSL) — MSL-3, 168 hours (per fpgalink listing)
Manufacturer Lead Time — 1-7 days (per fpgalink listing)

데이터시트 & 자료

모든 제품 보기 BOM 생성 견적 요청