EPM9560RC304-15F vs EPM9560RI304-15 비교
다음의 상세 나란히 비교: EPM9560RC304-15F 제조: Altera 및 EPM9560RI304-15 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Altera
EPM9560RC304-15F - 560-Macrocell MAX 9000 CPLD, 5V, RQFP-304 | Intel
EPM9560RC304-15F Obsolete사양 비교
| 파라미터 | EPM9560RC304-15F | EPM9560RI304-15 |
|---|---|---|
| 브랜드 | Altera | Intel |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | NRND |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $18.75 | $112.00 |
| Device Family | MAX 9000 | MAX 9000 |
| Series | EPM9560 | — |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | — |
| Propagation Delay (tpd) | 16.6 ns (max) | 11.4 ns (per digchip datasheet); 16.6 ns reported by MicrochipUSA |
| Maximum Internal Frequency | 117.6 MHz | 145 MHz |
| Core Supply Voltage | 5.0 V | — |
| User I/O Pins | 212 | — |
| Dedicated Inputs | 4 | 4 |
| Logic Array Blocks (LABs) | 16 (40 macrocells each) | — |
| 패키지 | RQFP-304 (304-pin Plastic QFP) | — |
| Programming Technology | 5.0 V in-system EEPROM via JTAG (IEEE 1149.1) | — |
| Architecture | Multiple Array MatriX (MAX) with PIA interconnect | Multiple Array MatriX (MAX) - EEPROM-based CPLD |
| Boundary Scan Test (BST) | Yes, JTAG-compliant | — |
| 동작 온도 | -40C to +85C (industrial) | 0 C to 70 C (commercial) |
| Process Technology | High-performance CMOS, EEPROM-based | 0.5 µm CMOS EEPROM |
| 실장 유형 | Surface Mount | Surface Mount |
| MSL 레벨 | 3 (168 hours) | — |
| RoHS 상태 | [DATA_NEEDED: rohs status - not stated in source] | [DATA_NEEDED: RoHS status] |
| Flip-Flops | — | 772 |
| User I/Os | — | 212 (216 per some datasheets) |
| Total Terminals | — | 304 |
| Package Code | — | HFQFP / S-PQFP-G304 |
| Package Type | — | 304-pin RQFP (Quad Flat Pack, gull-wing) |
| Speed Grade | — | -15 |
| Supply Voltage (VCCINT/VCCIO) | — | 4.5 V to 5.5 V (5 V typical) |
| I/O Logic Levels | — | 3.3 V or 5 V configurable |
| Temperature Grade | — | Industrial (per Partstack listings) |
| Logic Family | — | CMOS |
| Programming | — | 5.0-V in-system programmable via JTAG (IEEE 1149.1) |