LTC2315HTS8-12 vs LTC2313HTS8-14 비교
다음의 상세 나란히 비교: LTC2315HTS8-12 제조: Analog Devices 및 LTC2313HTS8-14 제조: Analog Devices. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Analog Devices
LTC2315HTS8-12 - 12-Bit 5Msps SAR ADC in TSOT-23 | Analog Devices
LTC2315HTS8-12 ✓ 활성Analog Devices
LTC2313HTS8-14 - 14-bit 2.5Msps SAR ADC in TSOT-23-8 | Analog Devices
LTC2313HTS8-14 ✓ 활성사양 비교
| 파라미터 | LTC2315HTS8-12 | LTC2313HTS8-14 |
|---|---|---|
| 브랜드 | Analog Devices | Analog Devices |
| 카테고리 | ADC/DAC | ADC/DAC |
| 수명 주기 상태 | 활성 | 활성 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $4.32 | $4.10 |
| Manufacturer | Analog Devices | — |
| Part Family | LTC2315-12 | — |
| 분해능 | 12 bit | 14 bits |
| 샘플링 속도 | 5 Msps | — |
| Architecture | SAR (Successive Approximation Register) | SAR (Successive Approximation Register) |
| Number of Channels | 1 input | — |
| Input Type | Single-ended / Pseudo-differential (true-sampling front end) | Pseudo-differential (IN+, IN-) |
| Analog Supply Voltage | 2.7 V to 5.25 V | — |
| Supply Current (Active, typ) | 6.4 mA | — |
| Reference | Internal bandgap with integrated buffer, 20 ppm/°C max drift | — |
| SINAD | 72.6 dB | — |
| THD | -84 dB | — |
| Digital Interface | SPI-compatible serial, 1.8 V / 2.5 V / 3 V / 5 V logic | — |
| Power-Down Modes | Nap and Sleep modes | — |
| 패키지 | TSOT-23-8 (8-pin) | TSOT-23-8 (HTS8) |
| 실장 유형 | Surface Mount | Surface Mount |
| Operating Temperature (H-grade) | -40 °C to +125 °C | — |
| RoHS 상태 | Compliant (per Analog Devices product page) | Compliant |
| Sample Rate | — | 2.5 Msps |
| Number of Input Channels | — | 1 (single-ended/differential) |
| 공급 전압 | — | 3 V to 5 V (single supply, 5 V typical) |
| 공급 전류 | — | 5 mA at 2.5 Msps |
| Internal Reference | — | 2.5 V nominal, 20 ppm/°C max drift |
| Serial Interface | — | SPI-compatible SCK/SDO/SDI/CSF, supports 1.8 V/2.5 V/3 V/5 V logic |
| No-Missing-Codes Performance | — | 14 bits guaranteed |
| Latency | — | 0 conversion latency |
| 동작 온도 범위 | — | -40 °C to +125 °C (H-grade) |
| MSL 레벨 | — | 1 (per JEDEC J-STD-020) |
| Conversion Cycles | — | 16 SCK per conversion (14-bit plus 2 dummy bits) |