RTAX250SL-1CG624E vs RTAX250SL-CG624E 비교
다음의 상세 나란히 비교: RTAX250SL-1CG624E 제조: Microchip Technology 및 RTAX250SL-CG624E 제조: Microchip Technology. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Microchip Technology
RTAX250SL-1CG624E - 250K Gate Rad-Tolerant FPGA, CCGA-624 | Microchip
RTAX250SL-1CG624E ✓ 활성Microchip Technology
RTAX250SL-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip
RTAX250SL-CG624E ✓ 활성사양 비교
| 파라미터 | RTAX250SL-1CG624E | RTAX250SL-CG624E |
|---|---|---|
| 브랜드 | Microchip Technology | Microchip Technology |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 활성 | 활성 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $1.00 | $1,375.00 |
| Equivalent System Gates | 250,000 gates | — |
| Configurable Logic Blocks (CLBs) | 2816 | — |
| Logic Cells | 4224 | — |
| User I/O | 248 inputs / 248 outputs | — |
| Core Supply Voltage | 1.5 V (1.425 V to 1.575 V) | 1.5 V |
| Maximum Combinatorial Delay (CLB) | 0.93 ns | — |
| Maximum System Frequency | 649 MHz | — |
| Process Technology | 0.15 um CMOS | 0.15 um CMOS |
| Logic Family | CMOS | CMOS |
| 패키지 | 624-ball Ceramic Column Grid Array (CCGA-624) | 624-Pin CCGA (Ceramic Column Grid Array) |
| 동작 온도 | -55C to +125C | -55C to +125C |
| Radiation Tolerance | SEU-immune to specified LET threshold; SEU rate < 10-10 errors/bit-day | SEU-hardened registers; SEU rate < 10-10 errors/bit-day |
| SEU Mitigation | SEU-hardened registers (no external TMR required) | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| Configuration | Live-at-power-up, true single-chip operation | — |
| 실장 유형 | Surface Mount (ceramic column grid array) | Surface Mount |
| RoHS 상태 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| I/O Supply Voltage | [DATA_NEEDED: I/O bank voltage] | — |
| Family | — | RTAX-S/SL Radiation-Tolerant FPGA |
| System Gates | — | 250000 |
| Logic Cells (CLBs) | — | 2816 |
| Maximum Frequency | — | 649 MHz |
| Supply Voltage Tolerance | — | +/-0.15 V |
| Maximum Combinatorial Delay | — | 0.93 ns |
| Clocking | — | Segmentable clocks, chip-wide highway routing |
| Programmability | — | Live at power-up, true single-chip |