PCA9546ADR - 4-Ch I2C/SMBus Switch with Reset | TI
부품 번호: PCA9546ADR ✓ 활성| 수량 | 단가 | 합계 |
|---|---|---|
| 1 | $1.2 | $1.20 |
| 10 | $1.08 | $10.80 |
| 100 | $0.95 | $95.00 |
| 500 | $0.82 | $410.00 |
| 1,000 | $0.72 | $720.00 |
PCA9546ADR 개요
An I2C multiplexer (also called an I2C switch or bus switch) is an interface IC that sits between a master controller and multiple I2C peripherals. In the interface IC hierarchy, it belongs to the bus switch family alongside level translators and bus buffers. Its core job is to resolve address conflicts between identical slave devices and to isolate bus segments so that one stuck slave cannot hang the entire bus.
Key features of the PCA9546A include 1-of-4 bidirectional translating switches with selectable combinations of channels, I2C bus and SMBus compatibility, an active-low RESET input that recovers the switch after a hung channel, three address pins allowing up to eight PCA9546A devices on a single I2C bus, and power-up with all switch channels deselected for deterministic bring-up. Typical pass-gate on-resistance is in the tens of ohms, which preserves signal integrity at standard 100 kHz and 400 kHz bus speeds.
Architecturally, the SCL/SDA upstream pair fans out to four downstream SCn/SDn pairs. Channel selection is done by writing to the programmable control register through the I2C bus itself; any individual channel or combination of channels can be enabled. The RESET pin restores the control register to the all-channels-deselected state without a power cycle, a key reliability feature in fault-tolerant designs.
Typical applications include I2C sensor fan-out in industrial equipment, multiple identical EEPROM or RTC devices on one controller, server and networking chassis management via SMBus, and consumer electronics where capacitive bus loading must be segmented. The 2.3V to 5.5V operating range makes it suitable for mixed-voltage system design.
Design consideration: because the switch is a passive pass-gate rather than a powered buffer, total bus capacitance across the selected path still counts against the I2C 400 pF limit. Place pull-up resistors so each isolated segment is properly terminated.
This page synthesizes distributor pricing, drop-in alternatives, pinout, and practical design notes not found in the manufacturer datasheet, as of 2026-10-20.
드롭인 대체품: PCA9546ADR — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
이 시리즈의 변형
다음과 드롭인 호환되는 동일 시리즈 모델: PCA9546ADR (동일 폼 팩터 및 풋프린트) — 차이점: Address Pins, Function, Interface, Package, Packaging.
빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:
PCA9546AD,112
✅ 드롭인✓ 재고 있음
$1.28 / 개
데이터시트 보기 →PCA9546ADR
✅ 드롭인✓ 재고 있음
$0.72 / 개
데이터시트 보기 →PCA9546ADR 최대 정격 & 전기적 특성
| 기능 | 4-channel bidirectional I2C/SMBus switch |
| Number of Channels | 4 (1-of-4 bidirectional translating switches) |
| 인터페이스 | I2C bus, SMBus compatible |
| Supply Voltage Range | 2.3 V to 5.5 V |
| On-Resistance | 16 ohm (typical pass-gate, per distributor parametric data) |
| Address Pins | 3 (A0, A1, A2) - up to 8 devices on one I2C bus |
| Reset Input | Active-low RESET |
| Power-Up State | All switch channels deselected |
| Control Register | Programmable via I2C bus |
| 패키지 | SOIC-16 (D suffix, 16-SOP) |
| 실장 유형 | Surface Mount |
| RoHS 상태 | Compliant (per distributor listings) |
| Packaging | Tape and Reel (R suffix) |
PCA9546ADR 핀 구성
| 핀 1 | SD0 — Serial data, downstream channel 0 |
| 핀 2 | SCL0 — Serial clock, downstream channel 0 |
| 핀 3 | SD1 — Serial data, downstream channel 1 |
| 핀 4 | SCL1 — Serial clock, downstream channel 1 |
| 핀 5 | SD2 — Serial data, downstream channel 2 |
| 핀 6 | SCL2 — Serial clock, downstream channel 2 |
| 핀 7 | SD3 — Serial data, downstream channel 3 |
| 핀 8 | SCL3 — Serial clock, downstream channel 3 |
| 핀 9 | GND — Ground |
| 핀 10 | RESET — Active-low reset input; restores control register to all-channels-deselected |
| 핀 11 | A2 — Address input 2 |
| 핀 12 | A1 — Address input 1 |
| 핀 13 | A0 — Address input 0 |
| 핀 14 | SDA — Serial data, upstream I2C bus |
| 핀 15 | SCL — Serial clock, upstream I2C bus |
| 핀 16 | VDD — Supply voltage, 2.3 V to 5.5 V |
일반적인 애플리케이션
PCA9546ADR 적합 용도: 6 애플리케이션s: I2C Sensor Fan-Out in Industrial Equipment, Server and Networking Chassis SMBus Management, Multiple EEPROM / RTC Expansion on One Controller, Consumer Electronics Display and Touch Subsystems, Battery-Powered Portable and IoT Devices, Test and Measurement Fixture Bus Switching.
I2C Sensor Fan-Out in Industrial Equipment
Industrial controllers frequently need to connect multiple identical temperature, humidity, or pressure sensors that ship with the same fixed I2C address. The PCA9546ADR resolves these address conflicts by placing each sensor on its own selectable SCn/SDn channel pair, letting a single master address up to four identical slaves plus up to eight multiplexer instances via its A0-A2 pins. With 2.3V to 5.5V operation and 16 ohm typical pass-gate resistance, signal integrity is preserved at 100 kHz and 400 kHz bus speeds. The active-low RESET input lets firmware recover the bus when a cable fault or ESD event hangs a remote sensor, avoiding a full system power cycle in installations where downtime is costly.
추천
Server and Networking Chassis SMBus Management
In server, switch, and baseband chassis, a BMC (board management controller) must poll dozens of power supplies, hot-swap controllers, EEPROMs, and fan controllers over SMBus. The PCA9546ADR segments the management bus into four isolated branches so a single crashed PSU SMBus interface cannot stall the entire management plane - the master simply disables the affected channel via the control register or asserts RESET. SMBus compatibility is native, and power-up with all channels deselected guarantees a deterministic boot state. The 2.3V to 5.5V supply accommodates 3.3V management rails directly, and the passive pass-gate adds negligible propagation delay to low-speed management traffic.
추천
Multiple EEPROM / RTC Expansion on One Controller
When a product needs several serial EEPROMs, real-time clocks, or configuration memories that share a fixed I2C address, the PCA9546ADR provides the cleanest fix: one channel per memory device. This avoids solder-strapping address pins on each memory and keeps the PCB simple. Capacitive loading is also segmented - each deselected branch is electrically removed, so the 400 pF I2C bus capacitance budget applies per selected path rather than to the whole harness. With three address pins, a design can cascade up to eight PCA9546ADR devices for up to 32 memory slots on one two-wire bus, a common architecture in test fixtures and programming stations.
추천
Consumer Electronics Display and Touch Subsystems
Smart appliances, set-top boxes, and display modules combine touch controllers, HDMI bridge chips, and ambient-light sensors on I2C. The PCA9546ADR isolates the high-traffic touch controller from the slower configuration peripherals, reducing arbitration latency on the touch path and letting each subsystem be power-managed independently by deselecting its channel. The 16 ohm pass-gate resistance is low enough that standard 4.7 kohm pull-ups keep rise times within specification at 400 kHz on short board traces. Its SOIC-16 package is inexpensive to assemble and hand-solderable for engineering builds, making it a convenient choice for consumer development platforms.
추천
Battery-Powered Portable and IoT Devices
Battery-operated designs benefit from the PCA9546ADR's passive switch core: with a channel deselected, that branch contributes only leakage current rather than holding a powered-on peripheral bus active. A microcontroller can shut down an entire sensor cluster by writing one control-register byte, simplifying duty-cycled power management in wearables, asset trackers, and smart-home nodes. The 2.3V minimum supply supports direct operation from a lithium cell through a 3.0V LDO, and SOIC-16 availability from multiple vendors protects small-batch production against allocation. Firmware should use the RESET pin on brownout to guarantee a known all-deselected state after supply disturbances.
추천
Test and Measurement Fixture Bus Switching
Automated test equipment often must talk to one of several devices under test through a shared I2C harness. The PCA9546ADR serves as a low-cost 1-of-4 bus selector controlled directly by the test executive over the same two wires, eliminating relay matrices for low-speed work. Any combination of channels can be enabled for parallel monitoring of multiple DUTs, and the active-low RESET provides a hard recovery path if a malfunctioning DUT clamps the bus. Because the switch is bidirectional and protocol-transparent, it works equally with standard 100 kHz, fast-mode 400 kHz, and SMBus traffic without firmware changes between fixtures.
추천
추천 제품 요약
엔지니어링 참조 데이터: PCA9546ADR — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | PCA9546AD,112 | PCA9546APW | PCA9546ADR (UMW) |
|---|---|---|---|---|
| Package | SOIC-16 | SOIC-16 - same | TSSOP-16 (footprint change) | SOIC-16 (16-SOP) - same |
| Brand | Texas Instruments | NXP Semiconductors | Texas Instruments | UMW |
| Channels | 4 bidirectional | 4 bidirectional | 4 bidirectional | 4 bidirectional |
| Supply Voltage | 2.3 V to 5.5 V | 2.3 V to 5.5 V | 2.3 V to 5.5 V | 2.3 V to 5.5 V |
| Reset Function | Active-low RESET | Active-low RESET | Active-low RESET | Active-low RESET |
| I2C / SMBus Compatibility | Yes | Yes | Yes | Yes |
| Drop-in on SOIC-16 Footprint | - | Yes (pin-to-pin) | No (different package) | Yes (pin-to-pin) |
주요 차별점
- Active-low RESET for bus-fault recovery (vs PCA9546AD,112)
- True drop-in SOIC-16 second source (vs PCA9546APW)
- Cost vs newer-generation TCA family (vs TCA9546A)
설계 노트
Connect RESET (pin 10) either to a supervisor output or to an MCU GPIO with a 10 kohm pull-up; never leave it floating, because the active-low input would hold the device in reset. On a brownout where the MCU loses state, asserting RESET for at least the datasheet pulse width restores the all-deselected control register, guaranteeing a clean boot state without power-cycling the mux. Estimated: a 10 kohm pull-up to 3.3V draws 0.33 mA when RESET is asserted - negligible for most designs.
The PCA9546A is a passive pass-gate, so it does not regenerate rise times or isolate capacitance in the electrical sense - the selected channel's downstream capacitance adds to the upstream bus. Estimated: with 4.7 kohm pull-ups at 400 kHz, keep total selected-path capacitance under the I2C 400 pF limit; a 200 pF cable plus 100 pF of slave loading already consumes most of the budget. For long cables or heavy fan-out, add a bus buffer such as the TCA9517DR or PCA9306DCTR level translator per TI application guidance.
The switch passes whatever logic levels the pull-up rails create - it is not a powered level translator. Do not assume a 3.3V master is protected from a 5V segment unless the 5V-side pull-ups are the only ones on that branch and the master inputs are 5V-tolerant or the channel is deselected. Also note that power-up state is all-channels-deselected: firmware must explicitly enable channels after boot, and code that assumes channel 0 is active at reset will fail.
Estimated: the PCA9546A is a low-power CMOS device; supply current is in the microamp-to-milliamp range per the datasheet, so a single 0.1 uF ceramic decoupling capacitor at pin 16 is normally sufficient. Place it within 2 mm of VDD. Avoid adding bulk capacitance unless the board shares the rail with noisy loads; the mux itself draws negligible dynamic current at I2C speeds.
규정 준수 정보
RoHS compliant per DigiKey and LCSC distributor listings for the TI 16-SOIC part. REACH, halogen-free, and conflict-minerals status not stated in the retrieved data - verify on the TI product page material declaration.
