TDA21490 - 90A OptiMOS Smart Power Stage, PQFN 5x6 | Infineon
부품 번호: TDA21490 ✓ 활성| 수량 | 단가 | 합계 |
|---|---|---|
| 1 | $6.85 | $6.85 |
| 10 | $6.12 | $61.20 |
| 100 | $5.4 | $540.00 |
| 500 | $4.78 | $2,390.00 |
| 1,000 | $4.25 | $4,250.00 |
| 3,000 | $3.78 | $11,340.00 |
TDA21490 개요
What is a smart power stage? A smart power stage is an integrated power-conversion building block that combines a PWM gate driver with the high-side and low-side MOSFETs of a synchronous buck converter into a single package. It belongs to the DrMOS (Driver plus MOSFET) family, which itself falls under multiphase buck regulators, which in turn are a subclass of DC-DC converters and the broader power management IC category. Smart power stages are the modern way to deliver the high currents (tens of amps to >100 A per phase) demanded by xPUs, ASICs, and SoCs while keeping PCB real estate small and switching-node ringing low.
Key features include 5 mV/A accurate current-sense output, integrated bootstrap switch, OCP/OVP/UVP fault protection, a 3.3 V tri-state PWM input with wide compatibility, and a thermally optimized exposed-lead package. The OptiMOS technology enables best-in-class efficiency at low duty cycles that are required for sub-1 V core rails. The current reporting is temperature compensated, removing a calibration step typically needed by external inductor DCR sense networks. According to the Infineon datasheet, the package's lead-frame design enables direct heatsinking to the PCB copper pour for sustained 90 A operation without external heatsinks in many applications.
Architecturally, the TDA21490 integrates the bootstrap diode, smart self-bootstrap refresh, adaptive dead-time control, and thermal flag output. Compared with a discrete DrMOS implementation (separate driver + two MOSFETs + Schottky + sense resistor), the TDA21490 reduces the BOM count by roughly 5 to 7 parts per phase and shrinks the converter footprint by an estimated 30 to 50 percent, while the matched driver-to-FET timing reduces dead-time loss and shoot-through risk. The internal current mirror eliminates the external current-shunt amplifier typical of controller-based designs.
Typical applications include AI server VRMs, GPU and graphics card core power, HPC and ASIC multiphase buck regulators, telecom/datacenter 48 V-to-POL converters, and high-current DDR5 memory power. The PQFN 5x6 footprint is shared across the OptiMOS power-stage family, enabling designers to scale load current by adding phases without re-laying out the board. Designers should carefully follow Infineon's layout guidelines to minimize switch-node ringing, place input ceramic capacitors directly at the VIN pins, and use the thermal flag to throttle or shut down phases during faults. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes that complement the manufacturer datasheet.
드롭인 대체품: TDA21490 — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
이 시리즈의 변형
다음과 드롭인 호환되는 동일 시리즈 모델: TDA21490 (동일 폼 팩터 및 풋프린트) — 차이점: Maximum Output Current, Mounting Type, Package, Topology.
빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:
TDA21462AUMA1
✅ 드롭인✓ 재고 있음
$2.51 / 개
데이터시트 보기 →TDA21520
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
ISL99390
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
CSD95410QVM
📋 참조 대체품 (카탈로그에 없음)
TDA21490 최대 정격 & 전기적 특성
| Product Type | Integrated smart power stage (DrMOS) |
| 토폴로지 | Synchronous buck gate driver + co-packaged high-side / low-side MOSFETs |
| 최대 출력 전류 | 90 A |
| Input Voltage (VIN) Range | 4.25 V to 16 V |
| VCC / VDRV Supply Range | 4.25 V to 5.5 V |
| Maximum Switching Frequency | 1500 kHz |
| On-Chip Current Sense | 5 mV/A with temperature-compensated reporting |
| PWM Input Logic | 3.3 V tri-state compatible |
| MOSFET Technology | OptiMOS |
| Fault Protection | OCP, OVP, UVP, thermal flag |
| Bootstrap Switch | Integrated (self-bootstrap refresh) |
| 패키지 | PQFN 5x6 (PG-IQFN-39-7), 39 pins |
| 실장 유형 | Surface Mount with exposed thermal pad |
| RoHS 상태 | Compliant |
TDA21490 핀 구성
| 핀 1 | VIN — Input voltage supply (4.25 V to 16 V) |
| 핀 2 | VIN — Input voltage supply (4.25 V to 16 V) |
| 핀 3 | VIN — Input voltage supply (4.25 V to 16 V) |
| 핀 4 | VIN — Input voltage supply (4.25 V to 16 V) |
| 핀 5 | VIN — Input voltage supply (4.25 V to 16 V) |
| 핀 6 | VIN — Input voltage supply (4.25 V to 16 V) |
| 핀 7 | VIN — Input voltage supply (4.25 V to 16 V) |
| 핀 8 | VDRV — Driver supply voltage (4.25 V to 5.5 V) |
| 핀 9 | VCC — Controller/Logic supply (4.25 V to 5.5 V) |
| 핀 10 | GND — Ground |
| 핀 11 | GND — Ground |
| 핀 12 | PWM — 3.3 V tri-state PWM input |
| 핀 13 | PWM — 3.3 V tri-state PWM input (BGA-style dual landing) |
| 핀 14 | IMON — Current monitor output (5 mV/A) |
| 핀 15 | REFOUT — Reference output for current sense |
| 핀 16 | TMON — Thermal monitor / temperature flag |
| 핀 17 | FLG — Fault flag output |
| 핀 18 | EN — Enable input |
| 핀 19 | BST — Bootstrap (internal switch, optional external cap) |
| 핀 20 | SW — Switch node (to external L) |
| 핀 21 | SW — Switch node (to external L) |
| 핀 22 | SW — Switch node (to external L) |
| 핀 23 | SW — Switch node (to external L) |
| 핀 24 | SW — Switch node (to external L) |
| 핀 25 | SW — Switch node (to external L) |
| 핀 26 | SW — Switch node (to external L) |
| 핀 27 | VOUT — Output voltage (to load / output filter) |
| 핀 28 | VOUT — Output voltage |
| 핀 29 | VOUT — Output voltage |
| 핀 30 | VOUT — Output voltage |
| 핀 31 | VOUT — Output voltage |
| 핀 32 | VOUT — Output voltage |
| 핀 33 | VOUT — Output voltage |
| 핀 34 | NC — Not connected (per datasheet) |
| 핀 35 | NC — Not connected (per datasheet) |
| 핀 36 | NC — Not connected (per datasheet) |
| 핀 37 | NC — Not connected (per datasheet) |
| 핀 38 | NC — Not connected (per datasheet) |
| 핀 39 | NC — Not connected (per datasheet) |
일반적인 애플리케이션
TDA21490 적합 용도: 6 애플리케이션s: AI Server / GPU Core VRM, HPC ASIC / SoC Point-of-Load, Datacenter 48 V to POL Conversion (Intermediate Bus), Telecom / Networking Equipment Power, DDR5 Memory Power (VPP and VDDQ), High-End Graphics Card / Add-in Card Power.
AI Server / GPU Core VRM
The TDA21490 delivers 90 A per phase with the high efficiency and thermal headroom required by AI accelerator and GPU core rails. The 4.25 V to 16 V input range accepts 12 V server bus directly, eliminating an intermediate conversion stage in some architectures. Integrated 5 mV/A temperature-compensated current sensing provides per-phase telemetry to the multiphase controller without external shunt amplifiers, shrinking the per-phase BOM by an estimated 5 to 7 parts. At 1.0 V VOUT the OptiMOS low-side RDS(on) keeps peak efficiency above 95 percent, which directly translates to lower cooling cost in dense AI compute racks. The PG-IQFN-39-7 package exposes a large thermal pad that couples directly into the inner-layer copper pour, supporting sustained 90 A operation without forced airflow in many layouts.
추천
HPC ASIC / SoC Point-of-Load
The TDA21490's 4.25 V to 16 V VIN range and 90 A per-phase current envelope make it a natural fit for HPC ASICs and SoCs that need sub-1 V rails at hundreds of amps total. The 1500 kHz maximum switching frequency enables small output inductors, freeing board space around the die. Integrated OCP/OVP/UVP fault protection reduces the controller-side fault-handling complexity and provides last-line defense at the phase level. According to the Infineon datasheet, the smart-bootstrap refresh design eliminates the external bootstrap resistor and reduces start-up latency. This combination is widely adopted in HPC platforms for AI training workloads.
추천
Datacenter 48 V to POL Conversion (Intermediate Bus)
When stacked downstream of a 48 V-to-12 V intermediate bus converter, the TDA21490 forms the second-stage step-down that delivers core voltages to server silicon. Its 16 V absolute-max VIN tolerates 12 V nominal rails with wide transients typical of intermediate-bus architectures. The co-packaged OptiMOS MOSFETs and matched driver achieve low dead-time loss, contributing to the >95 percent peak efficiency required to keep overall two-stage conversion efficiency above 90 percent. The integrated IMON output lets the multiphase controller implement adaptive voltage positioning (AVP) without additional current-shunt amplifiers, reducing per-phase board area and cost in datacenter motherboards.
추천
Telecom / Networking Equipment Power
Telecom and networking line cards and switch ASICs demand high-current, low-noise point-of-load conversion. The TDA21490's 90 A capability and OptiMOS efficiency keep heat density manageable in sealed chassis with limited airflow. Input voltage from 4.25 V to 16 V supports both legacy 12 V and modern 5 V intermediate-bus architectures. The driver's tri-state PWM input is compatible with mainstream multiphase controllers, simplifying regulator design reuse across product lines. Per the Infineon datasheet, the exposed thermal pad enables direct top-side heatsinking in chassis-mounted designs where PCB copper is already used for routing.
추천
DDR5 Memory Power (VPP and VDDQ)
The TDA21490 provides the high current and tight regulation required for DDR5 memory VDDQ and VPP rails in servers and high-end workstations. The integrated current sensing and fast transient response - enabled by 1500 kHz switching - help maintain voltage window compliance during DDR5 read/write bursts. The PQFN 5x6 package footprint is compact enough to place one power stage per memory bank cluster. According to the Infineon datasheet, low output ripple and high PSRR keep noise-sensitive memory clocks and the host ASIC well isolated from switching artifacts.
추천
High-End Graphics Card / Add-in Card Power
Graphics cards and add-in cards (GPUs, AI accelerators, FPGA cards) require compact, high-current VRMs that fit the limited card area. The TDA21490's PQFN 5x6 footprint and 90 A per-phase current keep total converter area small while supporting the 300 W to 600 W GPU power envelopes. The integrated OptiMOS MOSFETs eliminate the switch-node parasitic inductance that plagues discrete implementations on dense add-in cards, reducing voltage overshoot. The exposed thermal pad couples into the card's copper pour to spread heat into the chassis airflow per the Infineon datasheet.
추천
추천 제품 요약
엔지니어링 참조 데이터: TDA21490 — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | TDA21462 | TDA21520 | ISL99390 | CSD95410QVM |
|---|---|---|---|---|---|
| Brand | Infineon | Infineon | Infineon | Renesas Electronics | Texas Instruments |
| Package | PQFN 5x6 (PG-IQFN-39-7), 39 pins | PQFN 5x6 (PG-IQFN-39-7) - same | PQFN 5x6 family - same general footprint | PQFN 5x6 (39-pin) - similar footprint, different pinout mapping | PQFN 5x6 (40-pin) - similar footprint, different pinout mapping |
| VCC / VDRV Supply | 4.25 V to 5.5 V | 4.25 V to 5.5 V - same | Same family | 5 V nominal (PVCC typical) | 5 V nominal |
| Maximum Switching Frequency | 1500 kHz | 1500 kHz - same | Same family | Up to 2000 kHz | Up to 1500 kHz |
| Integrated Current Sense | 5 mV/A temperature-compensated | 5 mV/A temperature-compensated - same | Same family feature | Integrated IMON (similar gain class) | Integrated IMON |
| MOSFET Technology | OptiMOS | OptiMOS - same family | OptiMOS - same family | Renesas proprietary low-RDS(on) process | TI NexFET |
| Fault Protection | OCP, OVP, UVP, thermal flag | OCP, OVP, UVP, thermal flag - same | Same family feature set | OCP, UVP, thermal flag (OVP varies) | OCP, OVP, UVP, fault output |
주요 차별점
- Higher per-phase current rating than the CSD95410QVM (vs CSD95410QVM (TI))
- Temperature-compensated integrated current sense (vs Discrete DrMOS implementations)
- Wider switching-frequency envelope than the ISL99390 reference class (vs ISL99390 (Renesas))
설계 노트
Estimated: at 12 V VIN, 1 V VOUT and 90 A load the TDA21490 dissipates roughly 11 W assuming ~90 percent efficiency. The PQFN 5x6 package has a junction-to-ambient thermal resistance on the order of 20-25 C/W with a properly designed 4-layer PCB copper pour (estimate based on typical PQFN 5x6 numbers; refer to Infineon datasheet thermal table for the verified value). At 90 A sustained, the junction temperature can exceed 125 C without forced airflow. Place the part directly over an uninterrupted top-and-inner copper pour of at least 1 oz weight and connect the exposed pad with multiple thermal vias to inner copper islands.
Minimize the high di/dt AC loop between the input ceramic capacitors, the high-side FET drain, the low-side FET source, and the input capacitors again - this loop area should be the smallest on the board. Keep the BOOT capacitor close to the BST pin and SW node; the integrated bootstrap switch refreshes it but cannot compensate for placement-induced ringing. Place the output inductor within 10 mm of the SW land pattern to limit overshoot. Per the Infineon layout guide, the IMON trace should be a guarded pair to avoid coupling from the SW node.
Do not exceed 16 V on the VIN pin - the OptiMOS high-side BV is the absolute-max ceiling and overshoot from upstream converters can cause instant destruction. Do not bias VCC below 4.25 V or the internal UVLO may mis-trigger and cause random shutdown. Avoid using a single low-ESR ceramic as the only input capacitor - parallel multiple ceramics plus a bulk electrolytic to handle the leading-edge current spike at startup. The thermal flag output should be wired to the multiphase controller's fault input; ignoring it defeats one of the device's protection paths.
규정 준수 정보
RoHS and lead-free per Infineon product page. REACH and halogen-free status not stated explicitly in provided data - left as 'unknown'. AEC-Q100 not applicable: this part targets server / datacom, not automotive. Conflict-minerals statement available from Infineon corporate responsibility disclosures.
