2EDN7524GXTMA1 vs 2EDN7534FXTMA1 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci 2EDN7524GXTMA1 disebabkan oleh Infineon dan 2EDN7534FXTMA1 disebabkan oleh Infineon. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Infineon
2EDN7524GXTMA1 - 5A Dual Low-Side Gate Driver for MOSFET/GaN | Infineon
2EDN7524GXTMA1 ✓ Aktif
Pengandingan Spesifikasi
| Parametr | 2EDN7524GXTMA1 | 2EDN7534FXTMA1 |
|---|---|---|
| Merek | Infineon | Infineon |
| Kategori | Power MOSFET Drivers | Power MOSFET Drivers |
| Status Lingkungan Hidup | Aktif | Aktif |
| Product Type | Low-side gate driver IC | — |
| Number of Channels | 2 (dual) | — |
| Drive Current (Source/Sink) | 5 A peak | — |
| Input Logic | Non-inverting, TTL / 3.3 V CMOS-compatible | — |
| Input Voltage Tolerance | -10 V to +20 V on logic pins | — |
| Supply Voltage (VCC) | 4.5 V to 20 V [DATA_NEEDED: exact range] | — |
| Propagation Delay | 20 ns typical [DATA_NEEDED: exact figure] | — |
| Channel-to-Channel Delay Matching | 1 ns | — |
| Masa Pertambahan | 5 ns typical [DATA_NEEDED: exact test condition] | — |
| Masa jatuh | 5 ns typical [DATA_NEEDED: exact test condition] | — |
| Output Stage | Rail-to-rail, separate source/sink | — |
| UVLO Protection | Yes | — |
| Suhu Operasi | -40 C to +125 C | -40C to +125C |
| Kemasan | PG-WSON-8-1 (3 mm x 3 mm) with exposed thermal pad | PG-DSO-8 |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Aras MSL | [DATA_NEEDED: MSL level] | — |
| Status RoHS | Compliant | Compliant |
| Target Devices | Standard MOSFETs, superjunction MOSFETs, GaN HEMTs | — |
| Driver Type | — | Low-Side, Dual Channel |
| Number of Drivers | — | 2 |
| Peak Output Current | — | 5 A (source/sink) |
| Supply Voltage (VDD) | — | 4.5 V to 20 V |
| Input Voltage Range (logic pins) | — | -12 V to +22 V (absolute max) |
| Propagation Delay (typical) | — | 19 ns |
| Input Logic Compatibility | — | LV-TTL |
| Output Polarity | — | Non-Inverting |
| Output Voltage Clamping | — | Active, to VDD |
| Rise Time (typ.) | — | [DATA_NEEDED: rise time] |
| Fall Time (typ.) | — | [DATA_NEEDED: fall time] |
| Channel-to-Channel Skew | — | [DATA_NEEDED: channel skew] |
| Under-Voltage Lockout | — | Yes |
| Pin penggunaan | — | Yes |