ADC1412D080HN-C18 vs ADC1412D125HN-C18 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci ADC1412D080HN-C18 disebabkan oleh Renesas Electronics dan ADC1412D125HN-C18 disebabkan oleh Renesas Electronics. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Renesas Electronics
ADC1412D080HN-C18 - Dual 14-bit 80MSPS ADC, LVDS DDR | Renesas
ADC1412D080HN-C18 ObsoleteRenesas Electronics
ADC1412D125HN-C18 - 14-Bit Dual 125 MSPS ADC | Renesas
ADC1412D125HN-C18 ✓ AktifPengandingan Spesifikasi
| Parametr | ADC1412D080HN-C18 | ADC1412D125HN-C18 |
|---|---|---|
| Merek | Renesas Electronics | Renesas Electronics |
| Kategori | ADC/DAC | ADC/DAC |
| Status Lingkungan Hidup | Obsolete | Aktif |
| Pemecahkatan | 14 bit | 14 bit |
| Number of Channels | 2 | 2 (simultaneous sampling) |
| Sample Rate (per channel) | 80 Msps | — |
| Architecture | Pipelined | Pipelined |
| Output Interface | CMOS or LVDS DDR (selectable) | — |
| Input Channels | 2 (differential or single-ended) | — |
| Kemasan | 64-VFQFPN (HVQFN) 9x9 mm with exposed pad | 64-pin VFQFPN, 9 mm x 9 mm with exposed pad |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Kiraan Pin | 64 | — |
| Family Sample Rate Options | 65 / 80 / 105 / 125 Msps | — |
| Family Series | ADC1412D SER | — |
| Suhu Operasi | [DATA_NEEDED: operating temperature range] | — |
| Tegangan Pemberi Arus | [DATA_NEEDED: supply voltage] | — |
| Power Consumption | [DATA_NEEDED: power consumption per channel] | — |
| SNR | [DATA_NEEDED: signal-to-noise ratio] | — |
| SFDR | [DATA_NEEDED: spurious-free dynamic range] | — |
| Status RoHS | [DATA_NEEDED: RoHS compliance status] | Compliant |
| Aras MSL | [DATA_NEEDED: moisture sensitivity level] | 3 |
| Sample Rate (max) | — | 125 MSPS |
| Input Type | — | Differential |
| Input Full-Scale Range | — | 1.5 Vp-p (typical) |
| Analog Input Bandwidth | — | 1.1 GHz (typical) |
| Supply Voltage (AVDD / DRVDD) | — | 1.8 V |
| Digital Output Interface | — | LVDS or CMOS DDR |
| SNR (typical) | — | 71 dBFS |
| SFDR (typical) | — | 85 dBc |
| Power Dissipation (per channel, typ.) | — | [DATA_NEEDED: power dissipation per channel at 125 MSPS] |
| Gambaran Suhu Operasi | — | -40 C to +85 C (industrial) |
| Clock Input | — | Differential LVDS / LVPECL compatible |