CDK1308CILP40 vs CDK1308AILP40 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci CDK1308CILP40 disebabkan oleh MaxLinear dan CDK1308AILP40 disebabkan oleh MaxLinear. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | CDK1308CILP40 | CDK1308AILP40 |
|---|---|---|
| Merek | MaxLinear | MaxLinear |
| Kategori | ADC/DAC | ADC/DAC |
| Status Lingkungan Hidup | Aktif | Aktif |
| Pemecahkatan | 10 bit | 10 bit |
| Sampling Rate (max) | 40 MSPS | — |
| Family Sampling Rates | 20 / 40 / 65 / 80 MSPS | — |
| Architecture | Pipeline | Proprietary, digital error correction |
| Number of Channels | 1 | — |
| Analog Supply Voltage | 1.8 V | — |
| Digital I/O Supply Voltage | 1.7 V to 3.6 V | — |
| Power Dissipation (65 MSPS) | 38 mW | — |
| SNR | 61.6 dB at Fin = 8 MHz | — |
| Input Type | Single-ended / Differential | — |
| Reference Type | Internal | — |
| Output Interface | Parallel CMOS | — |
| Kemasan | LQFP-40 | 40-pin QFN |
| Suhu Operasi | -40 C to +85 C | — |
| Status RoHS | Compliant | Compliant (per distributor listings) |
| Pin Compatible With | CDK1307 family | — |
| Maximum Sample Rate | — | 20 MSPS |
| Family Sample Rate Options | — | 20 / 40 / 65 / 80 MSPS |
| Reference | — | Internal (no external reference required) |
| Digital Interface | — | CMOS, parallel |
| Control Interface | — | CMOS |
| Power-Down Pin (PD_N) | — | Yes (active low) |
| Sleep Pin (SLP_N) | — | Yes (active low) |
| Jenis Pemasangan | — | Surface Mount |
| Power Consumption | — | Ultra-low (per family datasheet, exact value [DATA_NEEDED: power consumption mW]) |
| Gambaran Suhu Operasi | — | [DATA_NEEDED: operating temperature range] |
| Tegangan Pemberi Arus | — | [DATA_NEEDED: AVDD / DRVDD values] |
| Manufacturer | — | MaxLinear (formerly Exar Corporation) |