CDK2307CILP64 vs CDK1307CILP40 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci CDK2307CILP64 disebabkan oleh MaxLinear dan CDK1307CILP40 disebabkan oleh MaxLinear. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | CDK2307CILP64 | CDK1307CILP40 |
|---|---|---|
| Merek | MaxLinear | MaxLinear |
| Kategori | ADC/DAC | ADC/DAC |
| Status Lingkungan Hidup | Aktif | Aktif |
| Manufacturer | MaxLinear (formerly Exar / Cadeka) | MaxLinear (formerly Exar/Cadeka) |
| Part Number | CDK2307CILP64 | CDK1307CILP40 |
| Fungsi | Dual-channel Analog-to-Digital Converter (ADC) | Analog-to-Digital Converter (ADC) |
| Number of Channels | 2 | — |
| Pemecahkatan | 12-bit / 13-bit | 12-bit / 13-bit selectable |
| Maximum Sample Rate | 80 MSPS (12-bit), 65 MSPS (13-bit) | — |
| Supported Sample Rates | 20 / 40 / 65 / 80 MSPS | — |
| Converter Architecture | Pipelined with digital error correction | — |
| Input Type | Differential analog inputs | Single-ended analog input |
| Digital Output | Parallel CMOS | — |
| Data Interface | CMOS parallel | — |
| Reference Type | Internal (on-chip) | — |
| Kemasan | 64-pin QFN (LP64) with exposed pad | 40-pin LQFP (LP) |
| Jenis Pemasangan | Surface Mount | — |
| Packaging | Tray | — |
| Gambaran Suhu Operasi | [DATA_NEEDED: operating temperature range] | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Sample Rate | — | 65 MSPS (family supports 20/40/65/80 MSPS) |
| Architecture | — | Multi-stage pipeline with digital error correction |
| Full-Scale Input Range | — | 1 Vpp typical |
| Supply Voltage (Analog) | — | 3.3 V |
| Supply Voltage (Digital) | — | 3.3 V |
| Reference | — | Internal (1.2 V bandgap) |
| Output Interface | — | Parallel CMOS |
| Control Interface | — | CMOS serial configuration |
| Suhu Operasi | — | -40 C to +85 C (industrial) |