EP1K50TC144-3N vs EPF10K50STC144-3 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP1K50TC144-3N disebabkan oleh Intel dan EPF10K50STC144-3 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP1K50TC144-3N EPF10K50STC144-3
Merek Intel Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Series ACEX-1K FLEX 10KS
Family ACEX 1K Programmable Logic Device Family FLEX 10K
Logic Elements / Cells 2880 2,880
System Gates 40960 (50K nominal) —
Number of LABs/CLBs 360 —
Embedded Memory (EAB) 40 kbit (12 EABs, dual-port) —
User I/O Count 102 —
Number of Gates 199000 (maximum) —
Operating Frequency (Max) 166.67 MHz —
Core Voltage 2.5 V 2.5 V
I/O Voltage Support 2.5 V / 3.3 V / 5.0 V (multiVolt) —
Process Technology 0.22 µm CMOS 0.22 um CMOS, SRAM-based
Logic Delay (pin-to-pin) 5.0 ns —
Kemasan 144-LQFP (TQFP-144), 22 x 22 mm, 0.5 mm pitch 144-LQFP (also called LFQFP / TQFP)
Programming Interface JTAG (IEEE 1149.1) / Altera serial —
Operating Temperature Grade Commercial (0 °C to +70 °C) — inferred from '-N' suffix —
Jenis Pemasangan Surface Mount Surface Mount (Gull-wing leads)
Status RoHS Compliant [DATA_NEEDED: RoHS status]
Typical Gates — 50,000
Logic Array Blocks (LABs) — 360
On-chip RAM Bits — 40,960
Maximum User I/Os — 102
Number of I/O Banks — [DATA_NEEDED: number of I/O banks]
Internal Operating Frequency — 166.67 MHz
Propagation Delay — 0.6 ns (typical)
Speed Grade — -3
I/O Voltage — 5.0 V (3.3 V LVTTL/LVCMOS compatible)
Suhu Operasi — 0 C to 70 C (commercial)
Configuration — SRAM (volatile, requires external EPC)
JTAG Boundary Scan — Built-in, IEEE Std. 1149.1-1990 compliant

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