EP1M350F78016 vs EP1M350F780C6N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP1M350F78016 disebabkan oleh Intel dan EP1M350F780C6N disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EP1M350F780C6N - Mercury 350K FPGA, 486 I/O, 780-BGA | Intel (Altera)
EP1M350F780C6N ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EP1M350F78016 | EP1M350F780C6N |
|---|---|---|
| Merek | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Masa Terakhir Dibeli |
| Family | Mercury PLD | Mercury (EP1M350) |
| Device Type | FPGA (Field Programmable Gate Array) | Loadable Programmable Logic Device (PLD) / FPGA |
| User I/O Count | 486 | — |
| Kemasan | 780-ball FCBGA (FineLine BGA) | 780-ball FC-FBGA (FINE LINE BGA-780) |
| Logic Element Architecture | 4-input LUT-based CLB | — |
| Embedded Memory | Yes (memory blocks) | — |
| Configuration Interface | JTAG (IEEE 1149.1) + serial/parallel passive | JTAG (IEEE 1149.1) / passive serial |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL+, HSTL, SSTL | — |
| Suhu Operasi | Industrial (-40C to +85C) | 0 C to 85 C |
| Speed Grade | -16 | — |
| Core Voltage | [DATA_NEEDED: core voltage] | — |
| Process Technology | Sub-micron CMOS | — |
| Jenis Pemasangan | Surface Mount (BGA) | — |
| Status RoHS | Compliant | [DATA_NEEDED: rohs_status] |
| Configuration Memory Support | Enhanced configuration device / passive serial | — |
| JTAG Boundary Scan | Yes (IEEE 1149.1) | — |
| Original Manufacturer | Altera Corporation (now Intel Programmable Solutions Group) | — |
| Logic Family | — | CMOS, SRAM-based LUT |
| System Gates | — | 350,000 |
| Logic Cells / Elements | — | 14,400 |
| User I/Os | — | 486 |
| Integrated Transceivers | — | Yes, with CDR up to 1.25 Gbps |
| Core Supply Voltage | — | 1.8 V |
| Terminal Form | — | Ball |
| Package Code (JEDEC) | — | S-PBGA-B780 |
| Aras MSL | — | [DATA_NEEDED: msl_level] |
| Lead-Free | — | [DATA_NEEDED: lead_free] |
| Architecture | — | Look-up table (LUT)-based, optimized for high-speed serial I/O |
| Total Package Pins / Balls | — | 780 |