EP1S20F672C7 vs EP1S20F672C6 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP1S20F672C7 disebabkan oleh Intel dan EP1S20F672C6 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EP1S20F672C7 - Stratix FPGA 18,460 LEs 672-BGA | Intel
EP1S20F672C7 ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EP1S20F672C7 | EP1S20F672C6 |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Masa Terakhir Dibeli | Obsolete |
| Series | Stratix | Stratix |
| Family | Altera Stratix FPGA | Stratix (first generation) |
| Logic Elements (LEs) | 18,460 | 18,460 |
| Embedded Memory Bits | 1,669,248 | 1,669,248 |
| User I/O Pins | 426 | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Kemasan | 672-ball FineLine BGA (35 x 35 mm, 1.27 mm pitch) | 672-ball FineLine BGA |
| Logic Family | CMOS, SRAM-based | — |
| Core Supply Voltage | 1.5 V | — |
| Suhu Operasi | 0C to 85C (commercial) | 0°C to +85°C (Commercial) |
| Speed Grade | C7 | C6 |
| Configuration Modes | JTAG, Passive Serial, Fast Passive Parallel, Active Serial | — |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Aras MSL | [DATA_NEEDED: MSL level] | — |
| Status RoHS | unknown | [DATA_NEEDED: RoHS compliance status] |
| Clock PLLs | Up to 10 | — |
| Manufacturer | — | Altera (now Intel) |
| Process Technology | — | 0.13 µm CMOS |
| Logic Array Blocks (LABs) | — | 1,846 |
| Maximum User I/Os | — | 426 |
| Package Code | — | F672 |
| Tegangan Pemberi Arus | — | Core 1.5 V, I/O programmable |