EP1SGX25FF1020C5L vs EP1SGX25FF1020C5 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP1SGX25FF1020C5L disebabkan oleh Altera dan EP1SGX25FF1020C5 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP1SGX25FF1020C5L EP1SGX25FF1020C5
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family Stratix GX Stratix GX
Logic Elements 25,660 cells 25,660
Process Technology 130 nm CMOS 130 nm
Package Type FC-FBGA (Flip-Chip Fine-pitch Ball Grid Array) FC-FBGA-1020 (33 x 33 mm, 1 mm pitch)
Kiraan Pin 1020 balls —
Core Voltage 1.5 V —
Speed Grade C5 (slowest tier) C5
Maximum Transceiver Data Rate 3.125 Gbps —
Maximum Operating Frequency 5000 MHz (internal reference) —
Jenis Pemasangan Surface Mount Surface Mount
Suhu Operasi [DATA_NEEDED: operating temperature range] 0 C to 85 C (commercial)
Memory Architecture TriMatrix (M512/M4K/M-RAM blocks) —
I/O Standards Supported LVDS, LVTTL, LVCMOS, HSTL, SSTL —
Configuration Scheme Active serial (EPCS), passive serial, JTAG —
DSP Blocks [DATA_NEEDED: DSP block count] —
Status RoHS [DATA_NEEDED: RoHS compliance] Compliant
Series — Stratix
LABs/CLBs — 2,566
Total Memory Bits — 1,694,720 bits (1.69 Mbit)
Number of I/O — 607
Supply Voltage (Core) — 1.5 V
Multi-Gigabit Transceivers — [DATA_NEEDED: MGT count for FF1020 package variant]
Embedded PLLs — 6
Embedded Multipliers (DSP blocks) — [DATA_NEEDED: DSP block count]
Logic Family — CMOS
Lead Free — Yes
Configuration Modes — PS, PPS, FPP, JTAG
Design Tool — Quartus II / Quartus Prime

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