EP20K400FI672-3 vs EP20K400FI672-3N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP20K400FI672-3 disebabkan oleh Altera dan EP20K400FI672-3N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Altera
EP20K400FI672-3N EP20K400FI672-3N - 833 MHz FPGA, 502 I/O, 672-PBGA

EP20K400FI672-3N - 833 MHz FPGA, 502 I/O, 672-PBGA

EP20K400FI672-3N Unknown

Pengandingan Spesifikasi

Parametr EP20K400FI672-3 EP20K400FI672-3N
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Unknown
Family APEX 20K —
Series EP20K400 EP20K400
Logic Elements 16640 —
Total Gates up to 400000 —
Embedded RAM 212992 bits —
Maximum User I/O 502 —
Dedicated Inputs 6 —
Propagation Delay 3.6 ns 3.6 ns
Frekuensi Klock Maksimum 833 MHz 833 MHz
Supply Voltage (Nominal) 2.5 V —
Supply Voltage Range 2.375 V to 2.625 V 2.375 V to 2.625 V
Process Technology CMOS CMOS
Package Type PBGA (Plastic BGA) —
Package Code S-PBGA-B672 —
Terminal Count 672 672 terminals
Terminal Pitch 1.000 mm 1.000 mm
Package Shape Square BGA —
Jenis Pemasangan Surface Mount Surface mount
Configuration Interface JTAG (IEEE 1149.1) —
Suhu Operasi [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
Aras MSL 3 —
Peak Reflow Temperature 220 C —
Device Type — CMOS loadable programmable logic device
Product Family — APEX 20K
User I/O Count — 502
Nominal Supply Voltage — 2.5 V
Kemasan — S-PBGA-B672
Logic Capacity — [DATA_NEEDED: logic capacity]
Configuration Method — [DATA_NEEDED: configuration method]
I/O Standard Support — [DATA_NEEDED: supported I/O standards]
Status RoHS — unknown
REACH Status — unknown
AEC-Q100 Qualification — unknown

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