EP2A40F672C9 vs EP2A40F672C9ES Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP2A40F672C9 disebabkan oleh Altera dan EP2A40F672C9ES disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EP2A40F672C9 - APEX II FPGA 1.5M Gates 38400 Cells 672-BGA | Altera
EP2A40F672C9 ⚠ Bahagian terakhir untuk beli
Pengandingan Spesifikasi
| Parametr | EP2A40F672C9 | EP2A40F672C9ES |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Masa Terakhir Dibeli | NRND |
| Family | APEX II | APEX II |
| Device Family | APEX II PLD | — |
| Logic Elements / Cells | 38,400 | — |
| System Gates | 1.5 M | 1,500,000 |
| Macros | 2,560 | — |
| User I/Os | 492 | — |
| Bilangan Pin | 672 | — |
| Kemasan | 672-BBGA, FC-FBGA (FineLine) | 672-pin FC-FBGA |
| Package Size | 27 mm × 27 mm, 1 mm ball pitch | — |
| Core Voltage | 1.5 V | 1.5 V |
| Process Technology | 0.15 µm all-layer copper, up to 8 metal layers | 0.15 µm CMOS |
| Logic Family | CMOS | — |
| Propagation Delay | 1.55 ns | — |
| Internal Speed Grade | 366 MHz | — |
| Suhu Operasi | 0 °C to 85 °C (commercial) | — |
| I/O Standards Supported | True-LVDS, LVPECL, PCML, HyperTransport | — |
| Jenis Pemasangan | Surface Mount | Surface Mount (BGA) |
| Status RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Logic Elements | — | 38,400 |
| Maximum User I/O | — | 492 |
| Operating Frequency (max) | — | 366 MHz |
| Speed Grade | — | -9 |
| Configuration Modes | — | PS, PPS, PPA, JTAG, FPP |
| Embedded Memory (ESB) | — | Yes (RAM/ROM/CAM) |
| I/O Standards | — | LVTTL, LVCMOS, PCI, SSTL, HSTL, GTL+ |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |