EP3SL200H780C4LN vs EP3SL200H780I4L Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP3SL200H780C4LN disebabkan oleh Altera dan EP3SL200H780I4L disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Altera
EP3SL200H780C4LN EP3SL200H780C4LN - Stratix III L 200K Logic Element FPGA | Intel

EP3SL200H780C4LN - Stratix III L 200K Logic Element FPGA | Intel

EP3SL200H780C4LN ⚠ Bahagian terakhir untuk beli

Pengandingan Spesifikasi

Parametr EP3SL200H780C4LN EP3SL200H780I4L
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Masa Terakhir Dibeli NRND
Series Stratix III L —
Logic Elements 200,000 200,000
Logic Array Blocks (LABs) 8,000 8,000
User I/Os 488 —
Total Memory Bits 10,901,504 —
Bilangan Pin 780 —
Kemasan 780-BBGA / HBGA / FCBGA 780-pin FC-HFBGA (Flip-Chip)
Jenis Pemasangan Surface Mount Surface Mount
Core Supply Voltage 0.86 V to 1.15 V 0.86 V to 1.15 V
Suhu Operasi 0 C to +70 C (commercial, 'C' grade) -40C to +100C (Industrial)
Speed Grade 4 (commercial, slowest of grade 4) I4 (Industrial)
Transceivers Multi-quad, up to 6.375 Gbps Up to 24 channels
DSP Blocks (18x18 multipliers) [DATA_NEEDED: exact multiplier count] —
PLLs 8 —
Configuration JTAG / Passive Serial / Fast Passive Parallel —
Status RoHS Compliant Compliant
Lead-Free Yes —
Family — Stratix III L
Embedded Memory (Bits) — 10,901,504
Maximum User I/O — 488
Process Technology — 65 nm CMOS
Internal Performance — 375 MHz
Transceiver Data Rate — Up to 6.375 Gbps
DSP Blocks — 9x9 / 18x18 / 36x36 multipliers
Memory Interface Support — DDR3, DDR2, DDR, QDR II+, RLDRAM II
JTAG Support — IEEE Std 1149.1 Boundary-Scan
HardCopy Support — Compatible (Lattice-style migration path via HardCopy III)

Laporan Datasheet & Sumber

Lihat Semua Produk Buat BOQ Minta Bao Harga