EP3SL200H780C4LN vs EP3SL200H780I4L Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL200H780C4LN sa pamamagitan ng Altera at EP3SL200H780I4L sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Altera
EP3SL200H780C4LN EP3SL200H780C4LN - Stratix III L 200K Logic Element FPGA | Intel

EP3SL200H780C4LN - Stratix III L 200K Logic Element FPGA | Intel

EP3SL200H780C4LN ⚠ Huling Pagbili

Pagsanggunian na paghahambing

Parametro EP3SL200H780C4LN EP3SL200H780I4L
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Huling Pagbili NRND
Series Stratix III L —
Logic Elements 200,000 200,000
Logic Array Blocks (LABs) 8,000 8,000
User I/Os 488 —
Total Memory Bits 10,901,504 —
Bilang ng Pins 780 —
Packhaging 780-BBGA / HBGA / FCBGA 780-pin FC-HFBGA (Flip-Chip)
Uri ng Pagpapasok Surface Mount Surface Mount
Core Supply Voltage 0.86 V to 1.15 V 0.86 V to 1.15 V
Temperature na Operasyon 0 C to +70 C (commercial, 'C' grade) -40C to +100C (Industrial)
Speed Grade 4 (commercial, slowest of grade 4) I4 (Industrial)
Transceivers Multi-quad, up to 6.375 Gbps Up to 24 channels
DSP Blocks (18x18 multipliers) [DATA_NEEDED: exact multiplier count] —
PLLs 8 —
Configuration JTAG / Passive Serial / Fast Passive Parallel —
Tindminan RoHS Compliant Compliant
Lead-Free Yes —
Family — Stratix III L
Embedded Memory (Bits) — 10,901,504
Maximum User I/O — 488
Process Technology — 65 nm CMOS
Internal Performance — 375 MHz
Transceiver Data Rate — Up to 6.375 Gbps
DSP Blocks — 9x9 / 18x18 / 36x36 multipliers
Memory Interface Support — DDR3, DDR2, DDR, QDR II+, RLDRAM II
JTAG Support — IEEE Std 1149.1 Boundary-Scan
HardCopy Support — Compatible (Lattice-style migration path via HardCopy III)

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