EP610DC-10 vs EP610ILC-10 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP610DC-10 disebabkan oleh Intel dan EP610ILC-10 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP610DC-10 EP610ILC-10
Merek Intel Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Device Family Altera Classic EPLD Classic EPLD
Macrocells 16 16
Maximum Pipelined Data Rate 100 MHz —
Pin-to-Pin Propagation Delay (tpd) 10 ns —
Speed Grade -10 —
Kemasan 24-pin CDIP (Ceramic DIP, windowed) PLCC-28 (plastic J-lead chip carrier)
Jenis Pemasangan Through-Hole Surface Mount (PLCC socket or solder)
Technology CMOS, EPROM-based (UV-erasable) —
Tegangan Pemberi Arus 5 V (single supply) 5 V (single supply)
Suhu Operasi 0C to +70C (commercial) [DATA_NEEDED: operating temperature range]
I/O Pins [DATA_NEEDED: exact I/O count for CDIP-24 variant] 16
Logic Elements 16 macrocells (programmable AND/OR array) —
Configuration Memory UV-erasable EPROM —
Reprogrammable Yes (UV erase window on package) —
Status RoHS [DATA_NEEDED: not stated in verified web data] [DATA_NEEDED: RoHS compliance]
Product Type — UV-Erasable / OTP PLD
Architecture — PAL-type with macrocells
Usable Gates — 300
Product Terms — 160
Dedicated Inputs — 4
Pin-to-Pin Delay (tPD) — 10 ns (grade -10)
Counter Frequency (fCNT) — 100 MHz
Logic Family Compatibility — TTL (5 V CMOS/TTL-compatible I/O)

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