EP610LC-35 vs EP610LI-35 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP610LC-35 disebabkan oleh Altera dan EP610LI-35 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP610LC-35 EP610LI-35
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family Altera Classic EPLD Classic EPLD
Device Series EP610 —
Macrocells 16 —
Usable Gates 300 300
Propagation Delay (tpd) 37 ns —
Supply Voltage (Vcc) 5 V —
Technology CMOS EEPROM (one-time-programmable plastic) —
Kemasan 28-pin PLCC (J-lead) 28-pin PLCC (windowed ceramic, 'LI')
Suhu Operasi Commercial (0C to +70C) [DATA_NEEDED: exact grade letter] —
Speed Grade -35 (slowest EP610) —
Jenis Pemasangan Surface Mount Surface Mount
Programmable Pins 24 input / 16 output (shared macrocells) —
Status RoHS [DATA_NEEDED: rohs_status] [DATA_NEEDED: RoHS compliance status]
Lead-Free [DATA_NEEDED: lead_free] —
Aras MSL [DATA_NEEDED: msl_level] —
Programming Tool MAX+PLUS II development system —
Series — EP610
Number of Macrocells — 16
Number of I/O Pins — 16
Total Inputs — 20
Dedicated Inputs — 4
External Clock Inputs — 2
Product Terms — 160
Maximum Propagation Delay — 35 ns (tpd)
Maximum Operating Frequency — 28.6 MHz (fmax)
Pipelined Data Rate — Up to 100 MHz
Tegangan Pemberi Arus — 5 V
Process Technology — CMOS
Architecture — PAL-type (AND-OR array)
Gambaran Suhu Operasi — [DATA_NEEDED: military/industrial operating temperature range]
Programming Technology — UV-erasable (EPROM)

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