EP910DM-40 vs EP910IDI-15 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP910DM-40 disebabkan oleh Altera dan EP910IDI-15 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EP910DM-40 | EP910IDI-15 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Product Type | UV Erasable Programmable Logic Device (EPLD) | — |
| Family | Altera Classic EP910 | Classic EPLD |
| Architecture | PAL-type AND/OR with global programmable interconnect bus | — |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 36 | — |
| Dedicated Outputs | 24 | — |
| Bidirectional I/O Lines | 24 | — |
| Product Terms | 240 | — |
| Propagation Delay (tPD) | 40 ns | — |
| External Clocks | 2 | — |
| Process Technology | CMOS | — |
| Kemasan | 40-pin Ceramic DIP (Cerdip) with UV window | 40-pin CDIP (CerDIP) with quartz window |
| Jenis Pemasangan | Through-Hole (DIP) | Through-hole (DIP) |
| Suhu Operasi | [DATA_NEEDED: operating temperature range] | -40C to +85C (industrial, "I" grade) |
| Tegangan Pemberi Arus | 5 V | — |
| Status RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance of CDIP windowed part] |
| Programming Interface | JEDEC-standard fuse-map / UV erasure | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Gates | — | 450 gates |
| Maximum User I/O Pins | — | 36 |
| Pin-to-Pin Propagation Delay (tpd) | — | 15 ns |
| Maximum Counter Frequency | — | 66.6 MHz |
| Supply Voltage (Vcc) | — | 5 V |
| Technology | — | CMOS EPROM |
| Program/Erase Method | — | UV-erasable windowed CerDIP |
| Macrocells Configurable As | — | D, T, JK, SR flip-flop, or combinatorial |
| Development Tool | — | MAX+PLUS II (legacy) / Altera Classic compiler |
| Programming Hardware | — | Altera Logic Programmer card |
| Logic Family Compatibility | — | Pin-, function-, and JEDEC-map compatible across all EP910 speed grades and packages |