EP910IPC-25 vs EP910IPC-50 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP910IPC-25 disebabkan oleh Intel dan EP910IPC-50 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP910IPC-25 EP910IPC-50
Merek Intel Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family Classic EPLD (EP910 series) Altera Classic EPLD
Manufacturer Altera (now Intel) —
Architecture PAL-type EPLD, CMOS, UV/OTP —
Usable Gates 450 —
Macrocells 24 —
Product Terms 240 —
Propagation Delay (tPD) 25 ns 50 ns
Maximum Frequency (fMAX) 40 MHz —
Dedicated Inputs 12 —
Bidirectional I/O Lines 24 —
Total Inputs (max) 36 —
Total Outputs (max) 24 —
Supply Voltage (VCC) 5 V 4.75 V to 5.25 V (5 V nominal)
Suhu Operasi 0C to +70C (commercial grade) -40C to +85C (industrial)
Kemasan 40-pin PDIP (PDIP-40) 40-pin Ceramic DIP (IPC, windowed)
Jenis Pemasangan Through-Hole Through-Hole (DIP)
Programming Method EPROM cell (OTP / UV erasable) Off-board EPROM programmer + UV erase
Development Tool MAX+PLUS II —
Product Type — Erasable Programmable Logic Device (EPLD)
Logic Capacity — [DATA_NEEDED: macrocell count / equivalent gates]
Clock-to-Output (tCO) — 35 ns
Maximum Toggle Frequency — [DATA_NEEDED: fMAX]
User I/O Pins — 24
Technology — CMOS EPROM cell
Erasure Method — UV light through ceramic window (IPC package)
Status RoHS — [DATA_NEEDED: not stated in verified data]

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